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[/] [thor/] [trunk/] [FT64v5/] [rtl/] [common/] [FT64_idecoder.v] - Diff between revs 53 and 55
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Rev 53 |
Rev 55 |
Line 735... |
Line 735... |
`LV: IsRFW = TRUE;
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`LV: IsRFW = TRUE;
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`LVx: IsRFW = TRUE;
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`LVx: IsRFW = TRUE;
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`CAS: IsRFW = TRUE;
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`CAS: IsRFW = TRUE;
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`AMO: IsRFW = TRUE;
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`AMO: IsRFW = TRUE;
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`CSRRW: IsRFW = TRUE;
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`CSRRW: IsRFW = TRUE;
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`LUI: IsRFW = TRUE;
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default: IsRFW = FALSE;
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default: IsRFW = FALSE;
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endcase
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endcase
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endfunction
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endfunction
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// Determines which lanes of the target register get updated.
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// Determines which lanes of the target register get updated.
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Line 938... |
Line 939... |
`endif
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`endif
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begin
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begin
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bus <= 144'h0;
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bus <= 144'h0;
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bus[`IB_CONST] <= instr[6]==1'b1 ? {{34{instr[47]}},instr[47:18]} :
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bus[`IB_CONST] <= instr[6]==1'b1 ? {{34{instr[47]}},instr[47:18]} :
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{{50{instr[31]}},instr[31:18]};
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{{50{instr[31]}},instr[31:18]};
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if (instr[`INSTRUCTION_OP]==`CMPRSSD)
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bus[`IB_LN] <= 3'd2;
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else
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case(instr[7:6])
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case(instr[7:6])
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2'b00: bus[`IB_LN] <= 3'd4;
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2'b00: bus[`IB_LN] <= 3'd4;
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2'b01: bus[`IB_LN] <= 3'd6;
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2'b01: bus[`IB_LN] <= 3'd6;
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default: bus[`IB_LN] <= 3'd2;
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default: bus[`IB_LN] <= 3'd2;
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endcase
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endcase
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