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[/] [thor/] [trunk/] [rtl/] [verilog/] [Thor_alu.v] - Diff between revs 9 and 10

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Rev 9 Rev 10
Line 378... Line 378...
                        o1[1] = alu_argAs < alu_argIs;
                        o1[1] = alu_argAs < alu_argIs;
                        o1[2] = alu_argA < alu_argI;
                        o1[2] = alu_argA < alu_argI;
                        o1[3] = 1'b0;
                        o1[3] = 1'b0;
                        o <= {16{o1}};
                        o <= {16{o1}};
                end
                end
`LB,`LBU,`LC,`LCU,`LH,`LHU,`LW,`SB,`SC,`SH,`SW,`CAS,`LVB,`LVC,`LVH,`LVH,`STI,
`LB,`LBU,`LC,`LCU,`LH,`LHU,`LW,`SB,`SC,`SH,`SW,`CAS,`LVB,`LVC,`LVH,`LVW,`STI,
`LWS,`SWS,`LEA,`RTS2,`STS,`STFND,`STCMP:
`LWS,`SWS,`RTS2,`STS,`STFND,`STCMP,`PUSH:
            begin
            begin
                                o <= alu_argA + alu_argC + alu_argI;
                                o <= alu_argA + alu_argC + alu_argI;
                    end
                    end
 
`JMPI:      o <= {alu_argA << alu_fn[1:0]} + alu_argC + alu_argI;
`LBX,`LBUX,`SBX,
`LBX,`LBUX,`SBX,
`LCX,`LCUX,`SCX,
`LCX,`LCUX,`SCX,
`LHX,`LHUX,`SHX,
`LHX,`LHUX,`SHX,
`LWX,`SWX:
`LWX,`SWX,
 
`JMPIX:
            case(alu_fn[1:0])
            case(alu_fn[1:0])
            2'd0:   o <= alu_argA + alu_argC + alu_argB;
            2'd0:   o <= alu_argA + alu_argC + alu_argB;
            2'd1:   o <= alu_argA + alu_argC + {alu_argB,1'b0};
            2'd1:   o <= alu_argA + alu_argC + {alu_argB,1'b0};
            2'd2:   o <= alu_argA + alu_argC + {alu_argB,2'b0};
            2'd2:   o <= alu_argA + alu_argC + {alu_argB,2'b0};
            2'd3:   o <= alu_argA + alu_argC + {alu_argB,3'b0};
            2'd3:   o <= alu_argA + alu_argC + {alu_argB,3'b0};
            endcase
            endcase
`ifdef STACKOPS
`ifdef STACKOPS
`PUSH,`PEA,`LINK: o <= alu_argA + alu_argC - 64'd8;
`PEA,`LINK: o <= alu_argA + alu_argC - 64'd8;
`UNLINK:    o <= alu_argA + alu_argC + 64'd8;
`UNLINK:    o <= alu_argA + alu_argC + 64'd8;
`POP:       o <= alu_argA + alu_argC;
`POP:       o <= alu_argA + alu_argC;
`endif
`endif
`JSR,`JSRS,`JSRZ,`SYS:  o <= alu_pc + insnsz;
`JSR,`JSRS,`JSRZ,`SYS:  o <= alu_pc + insnsz;
`INT:           o <= alu_pc;
`INT:           o <= alu_pc;
Line 421... Line 423...
            o <= 64'hDEADDEADDEADDEAD;
            o <= 64'hDEADDEADDEADDEAD;
`SHIFT:     o <= BIG ? shfto : 64'hDEADDEADDEADDEAD;
`SHIFT:     o <= BIG ? shfto : 64'hDEADDEADDEADDEAD;
`ifdef BITFIELDOPS
`ifdef BITFIELDOPS
`BITFIELD:      o <= BIG ? bf_out : 64'hDEADDEADDEADDEAD;
`BITFIELD:      o <= BIG ? bf_out : 64'hDEADDEADDEADDEAD;
`endif
`endif
`LOOP:      o <= alu_argB > 0 ? alu_argB - 64'd1 : alu_argB;
`LOOP:      o <= alu_argA > 0 ? alu_argA - 64'd1 : alu_argA;
default:        o <= 64'hDEADDEADDEADDEAD;
default:        o <= 64'hDEADDEADDEADDEAD;
endcase
endcase
end
end
 
 
// Generate done signal
// Generate done signal

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