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[/] [thor/] [trunk/] [rtl/] [verilog/] [Thor_defines.v] - Diff between revs 10 and 13

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Rev 10 Rev 13
Line 35... Line 35...
//`define FLOATING_POINT        1'b1
//`define FLOATING_POINT        1'b1
`define STRINGOPS       1'b1
`define STRINGOPS       1'b1
//`define DEBUG_LOGIC     1'b1
//`define DEBUG_LOGIC     1'b1
//`define THREEWAY    1'b1
//`define THREEWAY    1'b1
//`define TRAP_ILLEGALOPS 1'b1
//`define TRAP_ILLEGALOPS 1'b1
 
//`define PRIVCHKS        1'b1
 
//`define PCHIST      1'b1      // Primarily for debugging the processor
 
 
`define TRUE    1'b1
`define TRUE    1'b1
`define FALSE   1'b0
`define FALSE   1'b0
`define INV             1'b0
`define INV             1'b0
`define VAL             1'b1
`define VAL             1'b1
Line 63... Line 65...
`define _4ADDU                  6'h09
`define _4ADDU                  6'h09
`define _8ADDU                  6'h0A
`define _8ADDU                  6'h0A
`define _16ADDU                 6'h0B
`define _16ADDU                 6'h0B
`define MIN             6'h10
`define MIN             6'h10
`define MAX             6'h11
`define MAX             6'h11
 
`define MOD             6'h13
 
`define MODU            6'h17
`define R2          8'h41
`define R2          8'h41
`define CPUID           4'h0
`define CPUID           4'h0
`define REDOR           4'h1    // reduction or
`define REDOR           4'h1    // reduction or
`define REDAND          4'h2    // reduction and
`define REDAND          4'h2    // reduction and
`define PAR             4'h3    // parity
`define PAR             4'h3    // parity
Line 114... Line 118...
`define SHRI                    6'h11
`define SHRI                    6'h11
`define SHLUI                   6'h12
`define SHLUI                   6'h12
`define SHRUI                   6'h13
`define SHRUI                   6'h13
`define ROLI                    6'h14
`define ROLI                    6'h14
`define RORI                    6'h15
`define RORI                    6'h15
 
`define MODI        8'h5B
 
`define MODUI       8'h5F
 
 
 
`define LLA         8'h6A       // compute linear address
`define _2ADDUI         8'h6B
`define _2ADDUI         8'h6B
`define _4ADDUI         8'h6C
`define _4ADDUI         8'h6C
`define _8ADDUI         8'h6D
`define _8ADDUI         8'h6D
`define _16ADDUI        8'h6E
`define _16ADDUI        8'h6E
`define LDI                     8'h6F
`define LDI                     8'h6F
Line 246... Line 253...
`define LCUX            8'hB3
`define LCUX            8'hB3
`define LHX                     8'hB4
`define LHX                     8'hB4
`define LHUX            8'hB5
`define LHUX            8'hB5
`define LWX                     8'hB6
`define LWX                     8'hB6
`define JMPIX       8'hB7
`define JMPIX       8'hB7
 
`define LLAX        8'hB8
 
 
`define SBX                     8'hC0
`define SBX                     8'hC0
`define SCX                     8'hC1
`define SCX                     8'hC1
`define SHX                     8'hC2
`define SHX                     8'hC2
`define SWX                     8'hC3
`define SWX                     8'hC3

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