| Line 123... |
Line 123... |
alu0_misspc <= alu0_argA + alu0_argI;
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alu0_misspc <= alu0_argA + alu0_argI;
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`LOOP,`SYNC:
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`LOOP,`SYNC:
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alu0_misspc <= alu0_pc + alu0_insnsz;
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alu0_misspc <= alu0_pc + alu0_insnsz;
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`RTS:
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`RTS:
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alu0_misspc <= alu0_argA + alu0_fn[3:0];
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alu0_misspc <= alu0_argA + alu0_fn[3:0];
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`SYS,`INT:
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`SYS,`INT,`RTF,`JSF:
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alu0_misspc <= {1'b1,alu0_argA + alu0_argI};
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alu0_misspc <= {1'b1,alu0_argA + alu0_argI};
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default:
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default:
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alu0_misspc <= (alu0_bt ? alu0_pc + alu0_insnsz : alu0_pc + alu0_insnsz + alu0_argI);
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alu0_misspc <= (alu0_bt ? alu0_pc + alu0_insnsz : alu0_pc + alu0_insnsz + alu0_argI);
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endcase
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endcase
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|
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| Line 137... |
Line 137... |
alu1_misspc <= alu1_argA + alu1_argI;
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alu1_misspc <= alu1_argA + alu1_argI;
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`LOOP,`SYNC:
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`LOOP,`SYNC:
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alu1_misspc <= alu1_pc + alu1_insnsz;
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alu1_misspc <= alu1_pc + alu1_insnsz;
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`RTS:
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`RTS:
|
alu1_misspc <= alu1_argA + alu1_fn[3:0];
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alu1_misspc <= alu1_argA + alu1_fn[3:0];
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`SYS,`INT:
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`SYS,`INT,`RTF,`JSF:
|
alu1_misspc <= {1'b1,alu1_argA + alu1_argI};
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alu1_misspc <= {1'b1,alu1_argA + alu1_argI};
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default:
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default:
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alu1_misspc <= (alu1_bt ? alu1_pc + alu1_insnsz : alu1_pc + alu1_insnsz + alu1_argI);
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alu1_misspc <= (alu1_bt ? alu1_pc + alu1_insnsz : alu1_pc + alu1_insnsz + alu1_argI);
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endcase
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endcase
|
|
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| Line 151... |
Line 151... |
2'd2: jmpi_misspc <= (DBW==32) ? dram_bus[31:0] : {dram0_misspc[63:32],dram_bus[31:0]};
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2'd2: jmpi_misspc <= (DBW==32) ? dram_bus[31:0] : {dram0_misspc[63:32],dram_bus[31:0]};
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2'd3: jmpi_misspc <= dram_bus[DBW-1:0];
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2'd3: jmpi_misspc <= dram_bus[DBW-1:0];
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default: jmpi_misspc <= 32'h00000FA0; // unimplemented instruction vector
|
default: jmpi_misspc <= 32'h00000FA0; // unimplemented instruction vector
|
endcase
|
endcase
|
|
|
assign alu0_exc = (fnIsKMOnly(alu0_op) && !km && alu0_cmt) ? `EXC_PRIV :
|
wire dbze0 = alu0_op==`DIVI || alu0_op==`MODI || (alu0_op==`RR && (alu0_fn==`DIV || alu0_fn==`MOD));
|
(alu0_done && alu0_divByZero && alu0_cmt) ? `EXC_DBZ :
|
wire dbze1 = alu1_op==`DIVI || alu1_op==`MODI || (alu1_op==`RR && (alu1_fn==`DIV || alu1_fn==`MOD));
|
((alu0_op==`CHKI||(alu0_op==`RR && alu0_fn==`CHK)) && !alu0_out && alu0_cmt) ? `EXC_CHK :
|
|
`EXC_NONE;
|
assign alu0_exc = (fnIsKMOnly(alu0_op) && !km && alu0_cmt) ? `EX_PRIV :
|
|
(alu0_done && dbze0 && alu0_divByZero && alu0_cmt) ? `EX_DBZ :
|
assign alu1_exc = (fnIsKMOnly(alu1_op) && !km && alu1_cmt) ? `EXC_PRIV :
|
((alu0_op==`CHKXI||(alu0_op==`RR && alu0_fn==`CHKX)) && !alu0_out && alu0_cmt) ? `EX_CHK :
|
(alu1_done && alu1_divByZero && alu1_cmt) ? `EXC_DBZ :
|
(((alu0_op==`MTSPR && alu0_fn==0)|| alu0_op==`LDIS) && iqentry_tgt[alu0_id[2:0]][7:3]==5'h6) ?
|
((alu1_op==`CHKI ||(alu1_op==`RR && alu1_fn==`CHK)) && !alu1_out && alu1_cmt) ? `EXC_CHK :
|
{6'h20,iqentry_tgt[alu0_id[2:0]][2:0]} :
|
`EXC_NONE;
|
`EX_NONE;
|
|
|
|
assign alu1_exc = (fnIsKMOnly(alu1_op) && !km && alu1_cmt) ? `EX_PRIV :
|
|
(alu1_done && dbze1 && alu1_divByZero && alu1_cmt) ? `EX_DBZ :
|
|
((alu1_op==`CHKXI ||(alu1_op==`RR && alu1_fn==`CHKX)) && !alu1_out && alu1_cmt) ? `EX_CHK :
|
|
(((alu1_op==`MTSPR && alu1_fn==0)|| alu1_op==`LDIS) && iqentry_tgt[alu1_id[2:0]][7:3]==5'h6) ?
|
|
{6'h20,iqentry_tgt[alu1_id[2:0]][2:0]} :
|
|
`EX_NONE;
|
|
|
assign alu0_branchmiss = alu0_dataready &&
|
assign alu0_branchmiss = alu0_dataready &&
|
((fnIsBranch(alu0_op)) ? ((alu0_cmt && !alu0_bt) || (!alu0_cmt && alu0_bt))
|
((fnIsBranch(alu0_op)) ? ((alu0_cmt && !alu0_bt) || (!alu0_cmt && alu0_bt))
|
: !alu0_cmt ? (alu0_op==`LOOP)
|
: !alu0_cmt ? (alu0_op==`LOOP)
|
: (alu0_cmt && (alu0_op==`SYNC || alu0_op == `JSR || alu0_op == `JSRS || alu0_op == `JSRZ ||
|
: (alu0_cmt && (alu0_op==`SYNC || alu0_op == `JSR || alu0_op == `JSRS || alu0_op == `JSRZ ||
|
alu0_op==`SYS || alu0_op==`INT ||
|
alu0_op==`SYS || alu0_op==`INT || alu0_op==`RTF || alu0_op==`JSF ||
|
alu0_op==`RTS || alu0_op==`RTS2 || alu0_op==`RTD || alu0_op == `RTE || alu0_op==`RTI || ((alu0_op==`LOOP) && (alu0_argA == 64'd0)))));
|
alu0_op==`RTS || alu0_op==`RTS2 || alu0_op==`RTD || alu0_op == `RTE || alu0_op==`RTI || ((alu0_op==`LOOP) && (alu0_argA == 64'd0)))));
|
|
|
assign alu1_branchmiss = alu1_dataready &&
|
assign alu1_branchmiss = alu1_dataready &&
|
((fnIsBranch(alu1_op)) ? ((alu1_cmt && !alu1_bt) || (!alu1_cmt && alu1_bt))
|
((fnIsBranch(alu1_op)) ? ((alu1_cmt && !alu1_bt) || (!alu1_cmt && alu1_bt))
|
: !alu1_cmt ? (alu1_op==`LOOP)
|
: !alu1_cmt ? (alu1_op==`LOOP)
|
: (alu1_cmt && (alu1_op==`SYNC || alu1_op == `JSR || alu1_op == `JSRS || alu1_op == `JSRZ ||
|
: (alu1_cmt && (alu1_op==`SYNC || alu1_op == `JSR || alu1_op == `JSRS || alu1_op == `JSRZ ||
|
alu1_op==`SYS || alu1_op==`INT ||
|
alu1_op==`SYS || alu1_op==`INT || alu1_op==`RTF || alu1_op==`JSF ||
|
alu1_op==`RTS || alu1_op==`RTS2 || alu1_op==`RTD || alu1_op == `RTE || alu1_op==`RTI || ((alu1_op==`LOOP) && (alu1_argA == 64'd0)))));
|
alu1_op==`RTS || alu1_op==`RTS2 || alu1_op==`RTD || alu1_op == `RTE || alu1_op==`RTI || ((alu1_op==`LOOP) && (alu1_argA == 64'd0)))));
|
|
|
assign branchmiss = (alu0_branchmiss | alu1_branchmiss | mem_stringmiss | jmpi_miss),
|
assign branchmiss = (alu0_branchmiss | alu1_branchmiss | mem_stringmiss | jmpi_miss),
|
misspc = (jmpi_miss ? jmpi_misspc : mem_stringmiss ? dram0_misspc : alu0_branchmiss ? alu0_misspc : alu1_misspc),
|
misspc = (jmpi_miss ? jmpi_misspc : mem_stringmiss ? dram0_misspc : alu0_branchmiss ? alu0_misspc : alu1_misspc),
|
missid = (jmpi_miss ? dram0_id : mem_stringmiss ? dram0_id : alu0_branchmiss ? alu0_sourceid : alu1_sourceid);
|
missid = (jmpi_miss ? dram0_id : mem_stringmiss ? dram0_id : alu0_branchmiss ? alu0_sourceid : alu1_sourceid);
|
| Line 241... |
Line 248... |
default: fp0_done = 1'b1;
|
default: fp0_done = 1'b1;
|
endcase
|
endcase
|
end
|
end
|
|
|
assign fp0_cmt = fnPredicate(fp0_pred, fp0_cond);
|
assign fp0_cmt = fnPredicate(fp0_pred, fp0_cond);
|
assign fp0_exc = fp0_exception ? 8'd242 : 8'd0;
|
assign fp0_exc = fp0_exception ? `EX_FP : 9'd0;
|
|
|
assign fp0_v = fp0_dataready;
|
assign fp0_v = fp0_dataready;
|
assign fp0_id = fp0_sourceid;
|
assign fp0_id = fp0_sourceid;
|
`endif
|
`endif
|
|
|
