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[/] [thor/] [trunk/] [rtl/] [verilog/] [Thor_pic.v] - Diff between revs 3 and 18

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Rev 3 Rev 18
Line 147... Line 147...
                        3'd0,3'd1:
                        3'd0,3'd1:
                                begin
                                begin
                                        ie[15:0] <= dat_i[15:0];
                                        ie[15:0] <= dat_i[15:0];
                                end
                                end
                        3'd2,3'd3:
                        3'd2,3'd3:
                                ie[dat_i[3:0]] <= adr_i[2];
                                ie[dat_i[3:0]] <= adr_i[3];
                        3'd4:   es <= dat_i[15:0];
                        3'd4:   es <= dat_i[15:0];
                        3'd5:   rste[dat_i[3:0]] <= 1'b1;
                        3'd5:   rste[dat_i[3:0]] <= 1'b1;
 
                        default: ;
                        endcase
                        endcase
                end
                end
        end
        end
 
 
// read registers
// read registers

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