| Line 70... |
Line 70... |
TEXT_COLS EQU 0x0
|
TEXT_COLS EQU 0x0
|
TEXT_ROWS EQU 0x2
|
TEXT_ROWS EQU 0x2
|
TEXT_CURPOS EQU 0x16
|
TEXT_CURPOS EQU 0x16
|
KEYBD EQU 0xC0000
|
KEYBD EQU 0xC0000
|
|
|
|
PIC_IS EQU 0xC0FC0
|
PIC_IE EQU 0xC0FC8
|
PIC_IE EQU 0xC0FC8
|
PIC_ES EQU 0xC0FE0
|
PIC_ES EQU 0xC0FE0
|
PIC_ESR EQU 0xC0FE8 ; edge sense reset
|
PIC_ESR EQU 0xC0FE8 ; edge sense reset
|
|
|
KeyState1 EQU $2008
|
bss
|
KeyState2 EQU $2009
|
org $0000
|
KeybdLEDs EQU $200A
|
dw 0 ; the first word is unused
|
KeybdWaitFlag EQU $200B
|
Milliseconds dw 0
|
|
m_w dh 0
|
CursorX EQU $2030
|
m_z dh 0
|
CursorY EQU $2032
|
KeyState1 db 0
|
VideoPos EQU $2034
|
KeyState2 db 0
|
NormAttr EQU $2036
|
KeybdLEDs db 0
|
Vidregs EQU $2040
|
KeybdWaitFlag db 0
|
Vidptr EQU $2044
|
|
EscState EQU $2048
|
CursorX dc 0
|
Textrows EQU $204A
|
CursorY dc 0
|
Textcols EQU $204C
|
VideoPos dc 0
|
|
align 4
|
|
NormAttr dh 0
|
|
Vidregs dh 0
|
|
Vidptr dh 0
|
|
EscState dc 0
|
|
Textrows dc 0
|
|
Textcols dc 0
|
|
align 8
|
|
reg_save fill.w 64,0
|
|
creg_save fill.w 16,0
|
|
sreg_save fill.w 16,0
|
|
preg_save dw 0
|
|
|
bss
|
bss
|
org $4000
|
org $4000
|
|
|
Milliseconds dw 0
|
|
|
|
rxfull EQU 1
|
rxfull EQU 1
|
Uart_ms db 0
|
Uart_ms db 0
|
Uart_txxonoff db 0
|
Uart_txxonoff db 0
|
Uart_rxhead dc 0
|
Uart_rxhead dc 0
|
| Line 116... |
Line 128... |
|
|
code 17 bits
|
code 17 bits
|
org $FFFF8000
|
org $FFFF8000
|
|
|
cold_start:
|
cold_start:
|
|
|
; Initialize segment registers for flat model
|
; Initialize segment registers for flat model
|
mtspr cs,r0
|
|
ldis cs.lmt,#-1 ; maximum
|
|
mtspr zs,r0
|
mtspr zs,r0
|
ldis zs.lmt,#-1
|
ldis zs.lmt,#-1
|
mtspr ds,r0
|
mtspr ds,r0
|
ldis ds.lmt,#-1
|
ldis ds.lmt,#-1
|
mtspr es,r0
|
mtspr es,r0
|
| Line 142... |
Line 151... |
ldi r27,#$03bf8 ; initialize SP
|
ldi r27,#$03bf8 ; initialize SP
|
|
|
; switch processor to full speed
|
; switch processor to full speed
|
stp #$FFFF
|
stp #$FFFF
|
|
|
; set interrupt table at $0000
|
; set interrupt table at $1000
|
ldis c12,#0
|
ldis c12,#$1000
|
|
|
; set all vectors to the uninitialized interrupt vector
|
; set all vectors to the uninitialized interrupt vector
|
; mov r4,r0
|
mov r4,r0
|
; ldis lc,#255 ; 256 vectors to set
|
ldis lc,#255 ; 256 vectors to set
|
;su1:
|
su1:
|
; ldi r1,#uii_jmp
|
ldi r1,#uii_jmp
|
; mov r2,r4
|
mov r2,r4
|
; bsr set_vector ; trashes r2,r3
|
bsr set_vector ; trashes r2,r3
|
; addui r4,r4,#1
|
addui r4,r4,#1
|
; loop su1
|
loop su1
|
|
|
; setup break vector
|
; setup break vector
|
ldi r1,#brk_jmp
|
lla r1,cs:brk_jmp
|
ldi r2,#0
|
ldi r2,#0
|
bsr set_vector
|
bsr set_vector
|
|
|
; setup Video BIOS vector
|
; setup Video BIOS vector
|
ldi r1,#vb_jmp
|
lla r1,cs:vb_jmp
|
ldi r2,#10
|
ldi r2,#10
|
bsr set_vector
|
bsr set_vector
|
|
|
; setup NMI vector
|
; setup NMI vector
|
ldi r1,#nmi_jmp
|
lla r1,cs:nmi_jmp
|
ldi r2,#254
|
ldi r2,#254
|
bsr set_vector
|
bsr set_vector
|
|
|
|
lla r1,cs:svc_jmp
|
|
ldi r2,#190
|
|
bsr set_vector
|
|
lla r1,cs:rsc_jmp
|
|
ldi r2,#191
|
|
bsr set_vector
|
|
|
|
; spurious interrupt
|
|
;
|
|
lla r1,cs:spur_jmp
|
|
ldi r2,#192
|
|
bsr set_vector
|
|
|
; setup MSI vector
|
; setup MSI vector
|
sh r0,Milliseconds
|
sh r0,Milliseconds
|
ldi r1,#msi_jmp
|
lla r1,cs:msi_jmp
|
ldi r2,#193
|
ldi r2,#193
|
bsr set_vector
|
bsr set_vector
|
|
|
; setup IRQ vector
|
; setup IRQ vector
|
ldi r1,#tms_jmp
|
lla r1,cs:tms_jmp
|
ldi r2,#194
|
ldi r2,#194
|
bsr set_vector
|
bsr set_vector
|
|
|
|
; setup BTNU vector
|
|
lla r1,cs:btnu_jmp
|
|
ldi r2,#200
|
|
bsr set_vector
|
|
|
|
; setup KM vector
|
|
lla r1,cs:km_jmp
|
|
ldi r2,#245
|
|
bsr set_vector
|
|
|
; setup data bus error vector
|
; setup data bus error vector
|
ldi r1,#dbe_jmp
|
lla r1,cs:dbe_jmp
|
ldi r2,#251
|
ldi r2,#251
|
bsr set_vector
|
bsr set_vector
|
|
|
; Initialize PIC
|
; Initialize PIC
|
ldi r1,#%00111 ; time slice interrupt is edge sensitive
|
ldi r1,#%00000111 ; time slice interrupt is edge sensitive
|
sh r1,hs:PIC_ES
|
sh r1,hs:PIC_ES
|
ldi r1,#%00111 ; enable time slice interrupt, msi, nmi
|
ldi r1,#%100000111 ; enable time slice interrupt, msi, nmi
|
sh r1,hs:PIC_IE
|
sh r1,hs:PIC_IE
|
|
|
|
; Initialize random number generator
|
|
; m_z and m_w must not be zero
|
|
ldi r1,#$88888888
|
|
sh r1,m_w
|
|
ldi r1,#$77777777
|
|
sh r1,m_z
|
|
|
mov r1,r0
|
mov r1,r0
|
mov r2,r0
|
mov r2,r0
|
mov r3,r0
|
mov r3,r0
|
mov r4,r0
|
mov r4,r0
|
mov r5,r0
|
mov r5,r0
|
| Line 242... |
Line 281... |
|
|
; now globally enable interrupts using the RTI instruction, this will also
|
; now globally enable interrupts using the RTI instruction, this will also
|
; switch to core to application/user mode.
|
; switch to core to application/user mode.
|
ldis c14,#j1 ; c14 contains RTI return address
|
ldis c14,#j1 ; c14 contains RTI return address
|
sync
|
sync
|
; rti
|
rti
|
j1:
|
j1:
|
ldi r1,#2
|
ldi r1,#2
|
sc r1,hs:LEDS
|
sc r1,hs:LEDS
|
sb r0,EscState
|
sb r0,EscState
|
bsr SerialInit
|
bsr SerialInit
|
bsr Debugger
|
; bsr Debugger
|
ldi r2,#msgStartup
|
ldi r2,#msgStartup
|
ldis lc,#msgStartupEnd-msgStartup-1
|
ldis lc,#msgStartupEnd-msgStartup-1
|
j3:
|
j3:
|
; lbu r1,[r2]
|
; lbu r1,[r2]
|
; addui r2,r2,#1
|
; addui r2,r2,#1
|
| Line 271... |
Line 310... |
ldi r6,#2 ; Set Cursor Pos
|
ldi r6,#2 ; Set Cursor Pos
|
sys #10
|
sys #10
|
ldi r1,#6
|
ldi r1,#6
|
sc r1,hs:LEDS
|
sc r1,hs:LEDS
|
bsr alphabet
|
bsr alphabet
|
ldi r1,#msgStartup
|
lla r1,cs:msgStartup ; convert to linear address
|
ldi r6,#$14
|
ldi r6,#$14
|
sys #10
|
sys #10
|
; bsr VBDisplayString
|
|
ldi r5,#TEXTSCR
|
;------------------------------------------------------------------------------
|
.0001:
|
;------------------------------------------------------------------------------
|
.0002:
|
; Monitor
|
|
;------------------------------------------------------------------------------
|
|
;------------------------------------------------------------------------------
|
|
|
|
Monitor:
|
|
lla r1,cs:msgMonitor
|
|
bsr VBDisplayString
|
|
|
|
; Display monitor prompt
|
|
.prompt:
|
|
ldi r1,#CR
|
|
bsr VBDisplayChar
|
|
ldi r1,#LF
|
|
bsr VBDisplayChar
|
|
ldi r1,#'$'
|
|
bsr VBDisplayChar
|
|
bsr CursorOn
|
|
.getkey:
|
bsr KeybdGetCharWait
|
bsr KeybdGetCharWait
|
bsr VBDisplayChar
|
bsr VBDisplayChar
|
cmpi p0,r1,#CR
|
cmpi p0,r1,#CR
|
p0.ne br .0002
|
p0.ne br .getkey
|
bsr VBAsciiToScreen
|
bsr CursorOff
|
ori r1,r1,#%000000111_111111111_00_00000000
|
lcu r1,CursorY
|
sh r1,hs:[r5]
|
lcu r7,Textcols
|
addui r5,r5,#4
|
mtspr lc,r7 ; use loop counter as safety
|
br .0001
|
mulu r10,r1,r7 ; pos = row * cols
|
|
_4addu r10,r10,r0 ; pos *= 4
|
|
.0001:
|
|
bsr MonGetch1 ; get character skipping spaces
|
|
cmpi p0,r1,#'$' ; skip over prompt
|
|
p0.eq br .0001
|
|
cmpi p0,r1,#'d' ; debug ?
|
|
p0.eq bsr Debugger
|
|
cmpi p0,r1,#'g'
|
|
p0.eq bsr GoGraphics
|
|
cmpi p0,r1,#'t'
|
|
p0.eq bsr MonGetch
|
|
p0.eq cmpi p0,r1,#'x'
|
|
p0.eq bsr GoText
|
|
cmpi p0,r1,'r'
|
|
p0.eq bsr RandomDots
|
|
cmpi p0,r1,#'c'
|
|
p0.eq bsr VBClearScreen
|
|
p0.eq mov r1,r0
|
|
p0.eq mov r2,r0
|
|
p0.eq ldi r6,#2
|
|
p0.eq sys #10
|
|
br .prompt
|
|
|
|
;------------------------------------------------------------------------------
|
|
; Returns:
|
|
; r1 ascii code for character
|
|
; r10 incremented
|
|
; lc decremented
|
|
;------------------------------------------------------------------------------
|
|
|
|
MonGetch:
|
|
addui r31,r31,#-8
|
|
sws c1,[r31]
|
|
lhu r1,hs:[r10]
|
|
andi r1,r1,#$3ff
|
|
bsr VBScreenToAscii
|
|
addui r10,r10,#4
|
|
loop .0001 ; decrement loop counter
|
|
.0001:
|
|
lws c1,[r31]
|
|
addui r31,r31,#8
|
|
rts
|
|
|
|
;------------------------------------------------------------------------------
|
|
; Returns:
|
|
; r1 ascii code for character
|
|
; r10 incremented by number of spaces + 1
|
|
; lc decremented by number of spaces + 1
|
|
;------------------------------------------------------------------------------
|
|
|
|
MonGetch1:
|
|
addui r31,r31,#-8
|
|
sws c1,[r31]
|
|
.0001:
|
|
lhu r1,hs:[r10]
|
|
andi r1,r1,#$3ff
|
|
bsr VBScreenToAscii
|
|
addui r10,r10,#4
|
|
cmpi p0,r1,#' '
|
|
p0.leu loop .0001
|
|
lws c1,[r31]
|
|
addui r31,r31,#8
|
|
rts
|
|
|
|
;------------------------------------------------------------------------------
|
|
;------------------------------------------------------------------------------
|
|
|
|
GoGraphics:
|
|
lhu r3,Vidregs
|
|
ldi r1,#4
|
|
sc r1,Textrows
|
|
sh r1,hs:4[r3] ; # rows
|
|
ldi r1,#720
|
|
sh r1,hs:12[r3] ; window top
|
|
rts
|
|
|
|
GoText:
|
|
lhu r3,Vidregs
|
|
ldi r1,#31
|
|
sc r1,Textrows
|
|
sh r1,hs:4[r3] ; # rows
|
|
ldi r1,#17
|
|
sh r1,hs:12[r3] ; window top
|
|
rts
|
|
|
|
// ----------------------------------------------------------------------------
|
|
// Uses George Marsaglia's multiply method
|
|
//
|
|
// m_w = ; /* must not be zero */
|
|
// m_z = ; /* must not be zero */
|
|
//
|
|
// uint get_random()
|
|
// {
|
|
// m_z = 36969 * (m_z & 65535) + (m_z >> 16);
|
|
// m_w = 18000 * (m_w & 65535) + (m_w >> 16);
|
|
// return (m_z << 16) + m_w; /* 32-bit result */
|
|
// }
|
|
// ----------------------------------------------------------------------------
|
|
//
|
|
gen_rand:
|
|
addui r31,r31,#-8
|
|
sw r2,[r31]
|
|
lhu r1,m_z
|
|
mului r2,r1,#36969
|
|
shrui r1,r1,#16
|
|
addu r2,r2,r1
|
|
sh r2,m_z
|
|
|
|
lhu r1,m_w
|
|
mului r2,r1,#18000
|
|
shrui r1,r1,#16
|
|
addu r2,r2,r1
|
|
sh r2,m_w
|
|
rand:
|
|
lhu r1,m_z
|
|
shli r1,r1,#16
|
|
addu r1,r1,r2
|
|
lw r2,[r31]
|
|
addui r31,r31,#8
|
|
rts
|
|
|
|
// ----------------------------------------------------------------------------
|
|
// Display random dots on the graphics screen.
|
|
// ----------------------------------------------------------------------------
|
|
|
|
RandomDots:
|
|
addui r31,r31,#-8
|
|
sws c1,[r31]
|
|
mov r4,r0
|
|
.0001:
|
|
bsr gen_rand ; get random bitmap memory location
|
|
modu r2,r1,#172032 ; mod the memory size
|
|
shli r2,r2,#1 ; *2 for 16 bit data
|
|
bsr gen_rand ; get random color
|
|
modui r3,r1,#$1000 ; limit to 12 bits
|
|
sc r3,zs:$FFA00000[r2] ; store color in memory
|
|
addui r4,r4,#1 ; increment loop index
|
|
andi r4,r4,#$FFF ;
|
|
tst p0,r4 ; check if time to check for keypress
|
|
p0.eq bsr KeybdGetCharNoWait ; try get a key, but don't wait
|
|
tst p0,r1 ; branch if no key pressed
|
|
p0.lt br RandomDots.0001
|
|
lws c1,[r31]
|
|
addui r31,r31,#8
|
|
rts
|
|
|
|
;------------------------------------------------------------------------------
|
|
|
msgStartup:
|
msgStartup:
|
byte "Thor Test System Starting...",CR,LF,0
|
byte "Thor Test System Starting...",CR,LF,0
|
msgStartupEnd:
|
msgStartupEnd:
|
|
msgMonitor:
|
|
byte CR,LF
|
|
byte "d - run debugger",CR,LF
|
|
byte "g - graphics mode",CR,LF
|
|
byte "tx - text mode",CR,LF
|
|
byte "r - random dots",CR,LF
|
|
byte 0
|
|
|
bad_ram:
|
bad_ram:
|
ldi r1,#'B'
|
ldi r1,#'B'
|
bsr VBAsciiToScreen
|
bsr VBAsciiToScreen
|
ori r1,r1,#%011000000_111111111_00_00000000
|
ori r1,r1,#%011000000_111111111_00_00000000
|
| Line 328... |
Line 538... |
|
|
;------------------------------------------------------------------------------
|
;------------------------------------------------------------------------------
|
; Set interrupt vector
|
; Set interrupt vector
|
;
|
;
|
; Parameters:
|
; Parameters:
|
; r1 = address of jump code
|
; r1 = linear address of jump code
|
; r2 = vector number to set
|
; r2 = vector number to set
|
; Trashes: r2,r3
|
; Trashes: r2,r3,r5,p0
|
;------------------------------------------------------------------------------
|
;------------------------------------------------------------------------------
|
|
|
set_vector:
|
set_vector:
|
mfspr r3,c12 ; get base address of interrupt table
|
mfspr r3,c12 ; get base address of interrupt table
|
_16addu r2,r2,r3
|
_16addu r2,r2,r3
|
lh r3,cs:[r1]
|
lh r3,zs:[r1]
|
|
cmpi p0,r3,#$003F6F01 ; unitialized interrupt number load
|
|
p0.eq shli r5,r2,#18
|
|
p0.eq or r3,r3,r5
|
sh r3,zs:[r2]
|
sh r3,zs:[r2]
|
lh r3,cs:4[r1]
|
lh r3,zs:4[r1]
|
sh r3,zs:4[r2]
|
sh r3,zs:4[r2]
|
lh r3,cs:8[r1]
|
lh r3,zs:8[r1]
|
sh r3,zs:8[r2]
|
sh r3,zs:8[r2]
|
lh r3,cs:12[r1]
|
lh r3,zs:12[r1]
|
sh r3,zs:12[r2]
|
sh r3,zs:12[r2]
|
rts
|
rts
|
|
|
|
;------------------------------------------------------------------------------
|
|
; Save the register context.
|
|
;
|
|
; Parameters:
|
|
; DS points to app's data space
|
|
;
|
|
;------------------------------------------------------------------------------
|
|
|
|
save_context:
|
|
sw r1,reg_save+8*1
|
|
sw r2,reg_save+8*2
|
|
sw r3,reg_save+8*3
|
|
sw r4,reg_save+8*4
|
|
sw r5,reg_save+8*5
|
|
sw r6,reg_save+8*6
|
|
sw r7,reg_save+8*7
|
|
sw r8,reg_save+8*8
|
|
sw r9,reg_save+8*9
|
|
sw r10,reg_save+8*10
|
|
sw r11,reg_save+8*11
|
|
sw r12,reg_save+8*12
|
|
sw r13,reg_save+8*13
|
|
sw r14,reg_save+8*14
|
|
sw r15,reg_save+8*15
|
|
sw r16,reg_save+8*16
|
|
sw r17,reg_save+8*17
|
|
sw r18,reg_save+8*18
|
|
sw r19,reg_save+8*19
|
|
sw r20,reg_save+8*20
|
|
sw r21,reg_save+8*21
|
|
sw r22,reg_save+8*22
|
|
sw r23,reg_save+8*23
|
|
sw r24,reg_save+8*24
|
|
sw r25,reg_save+8*25
|
|
sw r26,reg_save+8*26
|
|
sw r27,reg_save+8*27
|
|
sw r28,reg_save+8*28
|
|
sw r29,reg_save+8*29
|
|
sw r30,reg_save+8*30
|
|
sw r31,reg_save+8*31
|
|
sws ds,sreg_save+8*1
|
|
sws es,sreg_save+8*2
|
|
sws fs,sreg_save+8*3
|
|
sws gs,sreg_save+8*4
|
|
sws hs,sreg_save+8*5
|
|
sws ss,sreg_save+8*6
|
|
sws cs,sreg_save+8*7
|
|
sws ds.lmt,sreg_save+8*9
|
|
sws es.lmt,sreg_save+8*10
|
|
sws fs.lmt,sreg_save+8*11
|
|
sws gs.lmt,sreg_save+8*12
|
|
sws hs.lmt,sreg_save+8*13
|
|
sws ss.lmt,sreg_save+8*14
|
|
sws cs.lmt,sreg_save+8*15
|
|
sws c1,creg_save+8*1
|
|
sws c2,creg_save+8*2
|
|
sws c3,creg_save+8*3
|
|
sws c4,creg_save+8*4
|
|
sws c5,creg_save+8*5
|
|
sws c6,creg_save+8*6
|
|
sws c7,creg_save+8*7
|
|
sws c8,creg_save+8*8
|
|
sws c9,creg_save+8*9
|
|
sws c10,creg_save+8*10
|
|
sws c11,creg_save+8*11
|
|
sws c13,creg_save+8*13
|
|
sws c14,creg_save+8*14
|
|
sws pregs,preg_save
|
|
rte
|
|
|
|
;------------------------------------------------------------------------------
|
|
; Restore register context.
|
|
; Parameters:
|
|
; DS points to app's data space.
|
|
;------------------------------------------------------------------------------
|
|
|
|
restore_context:
|
|
lw r1,reg_save+8*1
|
|
lw r2,reg_save+8*2
|
|
lw r3,reg_save+8*3
|
|
lw r4,reg_save+8*4
|
|
lw r5,reg_save+8*5
|
|
lw r6,reg_save+8*6
|
|
lw r7,reg_save+8*7
|
|
lw r8,reg_save+8*8
|
|
lw r9,reg_save+8*9
|
|
lw r10,reg_save+8*10
|
|
lw r11,reg_save+8*11
|
|
lw r12,reg_save+8*12
|
|
lw r13,reg_save+8*13
|
|
lw r14,reg_save+8*14
|
|
lw r15,reg_save+8*15
|
|
lw r16,reg_save+8*16
|
|
lw r17,reg_save+8*17
|
|
lw r18,reg_save+8*18
|
|
lw r19,reg_save+8*19
|
|
lw r20,reg_save+8*20
|
|
lw r21,reg_save+8*21
|
|
lw r22,reg_save+8*22
|
|
lw r23,reg_save+8*23
|
|
lw r24,reg_save+8*24
|
|
lw r25,reg_save+8*25
|
|
lw r26,reg_save+8*26
|
|
lw r27,reg_save+8*27
|
|
lw r28,reg_save+8*28
|
|
lw r29,reg_save+8*29
|
|
lw r30,reg_save+8*30
|
|
lw r31,reg_save+8*31
|
|
; lws ds,sreg_save+8*1
|
|
lws es,sreg_save+8*2
|
|
lws fs,sreg_save+8*3
|
|
lws gs,sreg_save+8*4
|
|
lws hs,sreg_save+8*5
|
|
lws ss,sreg_save+8*6
|
|
lws cs,sreg_save+8*7
|
|
; lws ds.lmt,sreg_save+8*9
|
|
lws es.lmt,sreg_save+8*10
|
|
lws fs.lmt,sreg_save+8*11
|
|
lws gs.lmt,sreg_save+8*12
|
|
lws hs.lmt,sreg_save+8*13
|
|
lws ss.lmt,sreg_save+8*14
|
|
lws cs.lmt,sreg_save+8*15
|
|
lws c1,creg_save+8*1
|
|
lws c2,creg_save+8*2
|
|
lws c3,creg_save+8*3
|
|
lws c4,creg_save+8*4
|
|
lws c5,creg_save+8*5
|
|
lws c6,creg_save+8*6
|
|
lws c7,creg_save+8*7
|
|
lws c8,creg_save+8*8
|
|
lws c9,creg_save+8*9
|
|
lws c10,creg_save+8*10
|
|
lws c11,creg_save+8*11
|
|
; lws c13,creg_save+8*13
|
|
lws c14,creg_save+8*14
|
|
lws pregs,preg_save
|
|
rte
|
|
|
.include "video.asm"
|
.include "video.asm"
|
.include "keyboard.asm"
|
.include "keyboard.asm"
|
.include "serial.asm"
|
.include "serial.asm"
|
.include "debugger.asm"
|
.include "debugger.asm"
|
|
|
|
|
|
;------------------------------------------------------------------------------
|
|
; BTNU IRQ routine.
|
|
;
|
|
;------------------------------------------------------------------------------
|
|
;
|
|
btnu_rout:
|
|
sync
|
|
addui r31,r31,#-16
|
|
sw r1,[r31]
|
|
sws hs,8[r31]
|
|
|
|
; set I/O segment
|
|
ldis hs,#$FFD00000
|
|
|
|
; update on-screen IRQ live indicator
|
|
lh r1,hs:TEXTSCR+312
|
|
addui r1,r1,#1
|
|
sh r1,hs:TEXTSCR+312
|
|
|
|
; restore regs and return
|
|
lw r1,[r31]
|
|
lws hs,8[r31]
|
|
addui r31,r31,#16
|
|
sync
|
|
rti
|
|
|
|
;------------------------------------------------------------------------------
|
|
;------------------------------------------------------------------------------
|
|
|
|
spur_rout:
|
|
sync
|
|
ldi r31,#INT_STACK-16
|
|
sw r1,[r31]
|
|
sws hs,8[r31]
|
|
|
|
; set I/O segment
|
|
ldis hs,#$FFD00000
|
|
|
|
; ldi r1,#18
|
|
; sc r1,hs:LEDS
|
|
|
|
; update on-screen IRQ live indicator
|
|
lh r1,hs:TEXTSCR+316
|
|
addui r1,r1,#1
|
|
sh r1,hs:TEXTSCR+316
|
|
|
|
; restore regs and return
|
|
lw r1,[r31]
|
|
lws hs,8[r31]
|
|
sync
|
|
rti
|
|
|
;------------------------------------------------------------------------------
|
;------------------------------------------------------------------------------
|
; Uninitialized interrupt
|
; Uninitialized interrupt
|
;------------------------------------------------------------------------------
|
;------------------------------------------------------------------------------
|
uii_rout:
|
uii_rout:
|
sync
|
sync
|
| Line 367... |
Line 771... |
|
|
; update on-screen IRQ live indicator
|
; update on-screen IRQ live indicator
|
ldi r1,#'U'|%011000000_111111111_00_00000000
|
ldi r1,#'U'|%011000000_111111111_00_00000000
|
sh r1,hs:TEXTSCR+320
|
sh r1,hs:TEXTSCR+320
|
|
|
|
mov r5,r63
|
|
sc r63,hs:LEDS
|
|
bsr DisplayAddr
|
|
|
|
ldi r6,#2
|
|
ldi r2,#0
|
|
ldi r7,#0
|
|
.0001:
|
|
ldis 60,#18 ; set breakout index to 18
|
|
sync
|
|
mtspr 61,r7 ; select history reg #
|
|
sync
|
|
ldis 60,#16 ; set breakout index to 16
|
|
sync
|
|
mfspr r5,61 ; get address
|
|
bsr DisplayAddr
|
|
addui r2,r2,#1
|
|
ldis 60,#17 ; set breakout index to 17
|
|
sync
|
|
mfspr r5,61 ; get address
|
|
bsr DisplayAddr
|
|
addui r2,r2,#1
|
|
addui r7,r7,#1
|
|
cmpi p0,r7,#63
|
|
p0.ltu br .0001
|
|
|
|
uii_hang:
|
|
br uii_hang
|
; restore regs and return
|
; restore regs and return
|
lw r1,[r31]
|
lw r1,[r31]
|
lws hs,8[r31]
|
lws hs,8[r31]
|
sync
|
sync
|
rti
|
rti
|
| Line 412... |
Line 844... |
;
|
;
|
;------------------------------------------------------------------------------
|
;------------------------------------------------------------------------------
|
;
|
;
|
msi_rout:
|
msi_rout:
|
sync
|
sync
|
ldi r31,#INT_STACK-16
|
addui r31,r31,#-16
|
sw r1,[r31]
|
sw r1,[r31]
|
sws hs,8[r31]
|
sws hs,8[r31]
|
|
|
; set I/O segment
|
; set I/O segment
|
ldis hs,#$FFD00000
|
ldis hs,#$FFD00000
|
| Line 427... |
Line 859... |
; reset the edge sense circuit to re-enable interrupts
|
; reset the edge sense circuit to re-enable interrupts
|
ldi r1,#1
|
ldi r1,#1
|
sh r1,hs:PIC_ESR
|
sh r1,hs:PIC_ESR
|
|
|
; update milliseconds
|
; update milliseconds
|
lh r1,Milliseconds
|
lh r1,zs:Milliseconds
|
addui r1,r1,#1
|
addui r1,r1,#1
|
sh r1,Milliseconds
|
sh r1,zs:Milliseconds
|
|
|
; restore regs and return
|
; restore regs and return
|
lw r1,[r31]
|
lw r1,[r31]
|
lws hs,8[r31]
|
lws hs,8[r31]
|
|
addui r31,r31,#16
|
sync
|
sync
|
rti
|
rti
|
|
|
;------------------------------------------------------------------------------
|
;------------------------------------------------------------------------------
|
; Time Slice IRQ routine.
|
; Time Slice IRQ routine.
|
;
|
;
|
;
|
|
;------------------------------------------------------------------------------
|
;------------------------------------------------------------------------------
|
;
|
;
|
tms_rout:
|
tms_rout:
|
sync
|
sync
|
ldi r31,#INT_STACK-16
|
addui r31,r31,#-16
|
sw r1,[r31]
|
sw r1,[r31]
|
sws hs,8[r31]
|
sws hs,8[r31]
|
|
|
; set I/O segment
|
; set I/O segment
|
ldis hs,#$FFD00000
|
ldis hs,#$FFD00000
|
| Line 467... |
Line 899... |
sh r1,hs:TEXTSCR+328
|
sh r1,hs:TEXTSCR+328
|
|
|
; restore regs and return
|
; restore regs and return
|
lw r1,[r31]
|
lw r1,[r31]
|
lws hs,8[r31]
|
lws hs,8[r31]
|
|
addui r31,r31,#16
|
sync
|
sync
|
rti
|
rti
|
|
|
;------------------------------------------------------------------------------
|
;------------------------------------------------------------------------------
|
; Time Slice IRQ routine.
|
; Data bus error routine.
|
;
|
;
|
;
|
;
|
;------------------------------------------------------------------------------
|
;------------------------------------------------------------------------------
|
;
|
;
|
dbe_rout:
|
dbe_rout:
|
| Line 534... |
Line 967... |
sh r1,zs:$FFD10148
|
sh r1,zs:$FFD10148
|
ldi r2,#10
|
ldi r2,#10
|
ldi r6,#0
|
ldi r6,#0
|
mfspr r5,c13
|
mfspr r5,c13
|
bsr DisplayAddr
|
bsr DisplayAddr
|
|
ldi r2,#10
|
|
ldi r6,#1
|
|
mfspr r5,c14
|
|
bsr DisplayAddr
|
|
ldi r6,#2
|
|
ldi r2,#0
|
|
ldi r7,#0
|
|
.0001:
|
|
ldis 60,#18 ; set breakout index to 18
|
|
sync
|
|
mtspr 61,r7 ; select history reg #
|
|
sync
|
|
ldis 60,#16 ; set breakout index to 16
|
|
sync
|
|
mfspr r5,61 ; get address
|
|
bsr DisplayAddr
|
|
addui r2,r2,#1
|
|
ldis 60,#17 ; set breakout index to 17
|
|
sync
|
|
mfspr r5,61 ; get address
|
|
bsr DisplayAddr
|
|
addui r2,r2,#1
|
|
addui r7,r7,#1
|
|
cmpi p0,r7,#63
|
|
p0.ltu br .0001
|
|
|
brk_lockup:
|
brk_lockup:
|
br brk_lockup[c0]
|
br brk_lockup[c0]
|
|
|
; code snippet to jump to the break routine, copied to the break vector
|
; code snippet to jump to the break routine, copied to the break vector
|
;
|
;
|
; vector table jumps
|
; vector table jumps
|
;
|
;
|
align 4
|
align 8
|
brk_jmp: jmp brk_rout[c0]
|
brk_jmp:
|
align 4
|
jmp brk_rout[c0]
|
tms_jmp: jmp tms_rout[c0]
|
align 8
|
align 4
|
tms_jmp:
|
msi_jmp: jmp msi_rout[c0]
|
jmp tms_rout[c0]
|
align 4
|
align 8
|
nmi_jmp: jmp nmi_rout[c0]
|
msi_jmp:
|
align 4
|
jmp msi_rout[c0]
|
uii_jmp: jmp uii_rout[c0]
|
align 8
|
align 4
|
nmi_jmp:
|
vb_jmp: jmp VideoBIOSCall[c0]
|
jmp nmi_rout[c0]
|
align 4
|
align 8
|
ser_jmp: jmp SerialIRQ[c0]
|
uii_jmp:
|
align 4
|
ldi r63,#00
|
dbe_jmp: jmp dbe_rout[c0]
|
jmp uii_rout[c0]
|
|
align 8
|
|
vb_jmp:
|
|
jmp VideoBIOSCall[c0]
|
|
align 8
|
|
ser_jmp:
|
|
jmp SerialIRQ[c0]
|
|
align 8
|
|
dbe_jmp:
|
|
jmp dbe_rout[c0]
|
|
align 8
|
|
svc_jmp:
|
|
jmp save_context[c0]
|
|
align 8
|
|
rsc_jmp:
|
|
jmp restore_context[c0]
|
|
align 8
|
|
spur_jmp:
|
|
jmp spur_rout[c0]
|
|
align 8
|
|
btnu_jmp:
|
|
jmp btnu_rout[c0]
|
|
align 8
|
|
rti_jmp:
|
|
km_jmp:
|
|
rti
|
|
|
;------------------------------------------------------------------------------
|
;------------------------------------------------------------------------------
|
; Reset Point
|
; Reset Point
|
;------------------------------------------------------------------------------
|
;------------------------------------------------------------------------------
|
|
|
org $FFFFEFF0
|
org $FFFFEFF0
|
jmp cold_start[C15]
|
jmp cold_start[c15]
|
|
|
extern my_main : 24
|
extern my_main : 24
|
|
|
