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https://opencores.org/ocsvn/thor/thor/trunk
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Line 17... |
Line 17... |
irq30Hz = false;
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irq30Hz = false;
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irq1024Hz = false;
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irq1024Hz = false;
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irqKeyboard = false;
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irqKeyboard = false;
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}
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}
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unsigned int clsPIC::Read(unsigned int ad) {
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int nn;
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unsigned int dat;
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switch((ad >> 3) & 7) {
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case 0:
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return vecno;
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default:
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dat = 0;
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for (nn = 0; nn < 16; nn++)
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dat |= (enables[nn] << nn);
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return dat;
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}
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}
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void clsPIC::Write(unsigned int ad, unsigned int dat, unsigned int mask) {
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int nn;
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switch((ad >> 3) & 7) {
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case 1:
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for (nn = 0; nn < 16; nn++)
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enables[nn] = (dat & (1 << nn)) != 0;
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break;
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case 2:
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enables[dat & 15] = false;
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break;
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case 3:
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enables[dat & 15] = true;
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break;
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case 5:
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if (dat==1)
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irq1024Hz = false;
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if (dat==2)
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irq30Hz = false;
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if (dat==7)
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irqUart = false;
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if (dat==3)
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irqKeyboard = false;
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break;
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}
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}
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void clsPIC::Step(void) {
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vecno = 192;
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irq = system1.cpu2.irq = false;
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if (enables[7] & irqUart) {
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irq = system1.cpu2.irq = true;
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vecno = 192+7;
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}
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if (enables[3] & irqKeyboard) {
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irq = system1.cpu2.irq = true;
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vecno = 192+3;
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}
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if (enables[2] & irq30Hz) {
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irq = system1.cpu2.irq = true;
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vecno = 192+2;
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}
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if (enables[1] & irq1024Hz) {
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irq = system1.cpu2.irq = true;
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vecno = 192+1;
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}
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system1.cpu2.vecno = vecno;
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}
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