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[/] [thor/] [trunk/] [software/] [emuThor/] [source/] [clsThor.cpp] - Diff between revs 32 and 35

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Rev 32	Rev 35
Line 203...	Line 203...
`{`	`{`
`bool ex = true; // execute instruction`	`bool ex = true; // execute instruction`
`unsigned int opcode, func;`	`unsigned int opcode, func;`
`__int64 disp;`	`__int64 disp;`
`int Ra,Rb,Rc,Rt,Pn,Cr,Ct;`	`int Ra,Rb,Rc,Rt,Pn,Cr,Ct;`
`int Sprn,Sg,Sc;`	`int Sprn,Sg,Sc,Sz;`
`int b1, b2, b3, b4;`	`int b1, b2, b3, b4;`
`int nn;`	`int nn;`
`__int64 dat;`	`__int64 dat;`
`unsigned __int64 overflow;`	`unsigned __int64 overflow;`
`unsigned __int64 carry;`	`unsigned __int64 carry;`
`unsigned __int64 a,b,res;`	`unsigned __int64 a,b,res;`

	`rts = false;`
	`// Capture PC History, but only when the PC changes.`
	`if (pcs[0] != pc) {`
`for (nn = 39; nn >= 0; nn--)`	`for (nn = 39; nn >= 0; nn--)`
`pcs[nn] = pcs[nn-1];`	`pcs[nn] = pcs[nn-1];`
`pcs[0] = pc;`	`pcs[0] = pc;`
	`}`
`if (IRQActive()) {`	`if (IRQActive()) {`
`StatusHWI = true;`	`StatusHWI = true;`
`if (string_pc)`	`if (string_pc)`
`ca[14] = string_pc;`	`ca[14] = string_pc;`
	`else {`
	`// If a prefix was present, back up to the previous insn.`
	`if (imm_prefix) {`
	`ca[14] = pcs[1];`
	`}`
`else`	`else`
`ca[14] = pc;`	`ca[14] = pc;`
	`}`
`pc = ca[12] + (vecno << 4);`	`pc = ca[12] + (vecno << 4);`
`ca[15] = pc;`	`ca[15] = pc;`
	`imm_prefix = false;`
`}`	`}`
`gp[0] = 0;`	`gp[0] = 0;`
`ca[0] = 0;`	`ca[0] = 0;`
`if (imcd > 0) {`	`if (imcd > 0) {`
`imcd--;`	`imcd--;`
Line 737...	Line 748...
`}`	`}`
`ca[15] = pc;`	`ca[15] = pc;`
`imm_prefix = false;`	`imm_prefix = false;`
`return;`	`return;`

	`case INC:`
	`b1 = ReadByte(pc);`
	`pc++;`
	`b2 = ReadByte(pc);`
	`pc++;`
	`b3 = ReadByte(pc);`
	`pc++;`
	`b4 = ReadByte(pc);`
	`pc++;`
	`if (ex) {`
	`int amt;`
	`__int64 val;`
	`Ra = b1 & 0x3f;`
	`Sz = (b1 >> 6) \| ((b2 & 1) << 2);`
	`func = (b2 >> 1) & 7;`
	`disp = (b2 >> 4) \| ((b3 & 31) << 4);`
	`if (disp & 0x100)`
	`disp \|= 0xFFFFFFFFFFFFFF00LL;`
	`Sg = b3 >> 5;`
	`amt = b4;`
	`if (amt & 0x80)`
	`amt \|= 0xFFFFFFFFFFFFFF00LL;`
	`ea = (unsigned __int64) disp + seg_base[Sg] + GetGP(Ra);`
	`switch(Sz&3) {`
	`case 0: val = ReadByte(ea); break;`
	`case 1: val = ReadChar(ea); break;`
	`case 2: val = ReadHalf(ea); break;`
	`case 3: val = Read(ea); break;`
	`}`
	`val = val + amt;`
	`switch(Sz&3) {`
	`case 0: system1->Write(ea,val,(0x1 << (ea & 7)) & 0xFF); break;`
	`case 1: system1->Write(ea,val,(0x3 << (ea & 6)) & 0xFF); break;`
	`case 2: system1->Write(ea,val,(0xF << (ea & 4)) & 0xFF); break;`
	`case 3: system1->Write(ea,val,0xFF); break;`
	`}`
	`}`
	`return;`

`case INT:`	`case INT:`
`b1 = ReadByte(pc);`	`b1 = ReadByte(pc);`
`pc++;`	`pc++;`
`b2 = ReadByte(pc);`	`b2 = ReadByte(pc);`
`pc++;`	`pc++;`
Line 779...	Line 829...
`b4 = ReadByte(pc);`	`b4 = ReadByte(pc);`
`pc++;`	`pc++;`
`if (ex) {`	`if (ex) {`
`Ct = b1 & 0x0F;`	`Ct = b1 & 0x0F;`
`Cr = (b1 & 0xF0) >> 4;`	`Cr = (b1 & 0xF0) >> 4;`
`if (Ct != 0)`	`if (Ct != 0) {`
`ca[Ct] = pc;`	`ca[Ct] = pc;`
	`sub_depth++;`
	`}`
`disp = (b4 << 16) \| (b3 << 8) \| b2;`	`disp = (b4 << 16) \| (b3 << 8) \| b2;`
`if (disp & 0x800000)`	`if (disp & 0x800000)`
`disp \|= 0xFFFFFFFFFF000000LL;`	`disp \|= 0xFFFFFFFFFF000000LL;`
`if (imm_prefix) {`	`if (imm_prefix) {`
`disp &= 0xFF;`	`disp &= 0xFF;`
Line 811...	Line 863...
`unsigned __int64 dat;`	`unsigned __int64 dat;`
`Ra = b1 & 0x3f;`	`Ra = b1 & 0x3f;`
`Ct = (b1 >> 6) \| ((b2 << 2) & 0xf);`	`Ct = (b1 >> 6) \| ((b2 << 2) & 0xf);`
`Sz = (b2 & 0xC) >> 2;`	`Sz = (b2 & 0xC) >> 2;`
`Sg = (b3 >> 5);`	`Sg = (b3 >> 5);`
`if (Ct != 0)`	`if (Ct != 0) {`
`ca[Ct] = pc;`	`ca[Ct] = pc;`
	`sub_depth++;`
	`}`
`disp = ((b3 & 0x1f) << 4) \| (b2 >> 4);`	`disp = ((b3 & 0x1f) << 4) \| (b2 >> 4);`
`if (disp & 0x100)`	`if (disp & 0x100)`
`disp \|= 0xFFFFFFFFFFFFFE00LL;`	`disp \|= 0xFFFFFFFFFFFFFE00LL;`
`if (imm_prefix) {`	`if (imm_prefix) {`
`disp &= 0xFF;`	`disp &= 0xFF;`
Line 1430...	Line 1484...
`// Memory synchronization primitives are not useful to the software ISA`	`// Memory synchronization primitives are not useful to the software ISA`
`// emulator. They are treated like NOP's.`	`// emulator. They are treated like NOP's.`
`case MEMSB:`	`case MEMSB:`
`ca[15] = pc;`	`ca[15] = pc;`
`imm_prefix = false;`	`imm_prefix = false;`
`break;`	`return;`

`case MEMDB:`	`case MEMDB:`
`ca[15] = pc;`	`ca[15] = pc;`
`imm_prefix = false;`	`imm_prefix = false;`
`break;`	`return;`

`case MFSPR:`	`case MFSPR:`
`b1 = ReadByte(pc);`	`b1 = ReadByte(pc);`
`pc++;`	`pc++;`
`b2 = ReadByte(pc);`	`b2 = ReadByte(pc);`
Line 1667...	Line 1721...
`Ra = b1 & 0x3f;`	`Ra = b1 & 0x3f;`
`Rt = ((b2 & 0xF) << 2) \| (( b1 >> 6) & 3);`	`Rt = ((b2 & 0xF) << 2) \| (( b1 >> 6) & 3);`
`switch(b2 >> 4) {`	`switch(b2 >> 4) {`
`case CPUID:`	`case CPUID:`
`switch(Ra) {`	`switch(Ra) {`
`case 0: SetGP(Rt,0x0002LL); break; // Processor ID`	`case 0: SetGP(Rt,0x0000LL); break; // Processor ID`
`case 2: SetGP(Rt,0x4e4F5254494E4966LL); break; // "Finitron"`	`case 2: SetGP(Rt,0x4e4F5254494E4966LL); break; // "Finitron"`
`case 3: SetGP(Rt,0x00LL); break;`	`case 3: SetGP(Rt,0x00LL); break;`
`case 4: SetGP(Rt,0x36346249547373LL); break; // 64BitSS`	`case 4: SetGP(Rt,0x36346249547373LL); break; // 64BitSS`
`case 5: SetGP(Rt,0x00LL); break;`	`case 5: SetGP(Rt,0x00LL); break;`
`case 6: SetGP(Rt,0x524F4A74LL); break; // "Thor"`	`case 6: SetGP(Rt,0x524F4A74LL); break; // "Thor"`
Line 1770...	Line 1824...
`break;`	`break;`
`case MUL:`	`case MUL:`
`SetGP(Rt,GetGP(Ra) * GetGP(Rb));`	`SetGP(Rt,GetGP(Ra) * GetGP(Rb));`
`break;`	`break;`
`case DIV:`	`case DIV:`
	`if (GetGP(Rb)==0) {`
	`if (StatusEXL < 255)`
	`StatusEXL++;`
	`ca[13] = pc;`
	`pc = ca[12] + (241 << 4);`
	`ca[15] = pc;`
	`}`
	`else`
`SetGP(Rt,GetGP(Ra) / GetGP(Rb));`	`SetGP(Rt,GetGP(Ra) / GetGP(Rb));`
`break;`	`break;`
`case MOD:`	`case MOD:`
	`if (GetGP(Rb)==0) {`
	`if (StatusEXL < 255)`
	`StatusEXL++;`
	`ca[13] = pc;`
	`pc = ca[12] + (241 << 4);`
	`ca[15] = pc;`
	`}`
	`else`
`SetGP(Rt,GetGP(Ra) % GetGP(Rb));`	`SetGP(Rt,GetGP(Ra) % GetGP(Rb));`
`break;`	`break;`
`case MULU:`	`case MULU:`
`SetGP(Rt,(unsigned __int64)GetGP(Ra) * (unsigned __int64)GetGP(Rb));`	`SetGP(Rt,(unsigned __int64)GetGP(Ra) * (unsigned __int64)GetGP(Rb));`
`break;`	`break;`
`case DIVU:`	`case DIVU:`
	`if (GetGP(Rb)==0)`
	`SetGP(Rt,-1LL);`
	`else`
`SetGP(Rt,(unsigned __int64)GetGP(Ra) / (unsigned __int64)GetGP(Rb));`	`SetGP(Rt,(unsigned __int64)GetGP(Ra) / (unsigned __int64)GetGP(Rb));`
`break;`	`break;`
`case MODU:`	`case MODU:`
	`if (GetGP(Rb)==0)`
	`SetGP(Rt,-1LL);`
	`else`
`SetGP(Rt,(unsigned __int64)GetGP(Ra) % (unsigned __int64)GetGP(Rb));`	`SetGP(Rt,(unsigned __int64)GetGP(Ra) % (unsigned __int64)GetGP(Rb));`
`break;`	`break;`
`case _2ADDU:`	`case _2ADDU:`
`SetGP(Rt,(GetGP(Ra) << 1) + GetGP(Rb));`	`SetGP(Rt,(GetGP(Ra) << 1) + GetGP(Rb));`
`break;`	`break;`
Line 1806...	Line 1882...

`case RTD:`	`case RTD:`
`if (ex) {`	`if (ex) {`
`StatusDBG = false;`	`StatusDBG = false;`
`pc = ca[11];`	`pc = ca[11];`
	`rts = true;`
`}`	`}`
`ca[15] = pc;`	`ca[15] = pc;`
`imm_prefix = false;`	`imm_prefix = false;`
`return;`	`return;`

`case RTE:`	`case RTE:`
`if (ex) {`	`if (ex) {`
`if (StatusEXL > 0)`	`if (StatusEXL > 0)`
`StatusEXL--;`	`StatusEXL--;`
`pc = ca[13];`	`pc = ca[13];`
	`rts = true;`
`}`	`}`
`ca[15] = pc;`	`ca[15] = pc;`
`imm_prefix = false;`	`imm_prefix = false;`
`return;`	`return;`

`case RTI:`	`case RTI:`
`if (ex) {`	`if (ex) {`
`im = 0;`	`imcd = 3;`
`StatusHWI = false;`	`StatusHWI = false;`
`pc = ca[14];`	`pc = ca[14];`
	`rts = true;`
`}`	`}`
`ca[15] = pc;`	`ca[15] = pc;`
`imm_prefix = false;`	`imm_prefix = false;`
`return;`	`return;`

Line 1837...	Line 1916...
`b1 = ReadByte(pc);`	`b1 = ReadByte(pc);`
`pc++;`	`pc++;`
`if (ex) {`	`if (ex) {`
`Cr = (b1 & 0xF0) >> 4;`	`Cr = (b1 & 0xF0) >> 4;`
`pc = ca[Cr] + (b1 & 0x0F);`	`pc = ca[Cr] + (b1 & 0x0F);`
	`rts = true;`
`if (sub_depth > 0) sub_depth--;`	`if (sub_depth > 0) sub_depth--;`
`}`	`}`
`ca[15] = pc;`	`ca[15] = pc;`
`imm_prefix = 0;`	`imm_prefix = 0;`
`return;`	`return;`

`case RTSQ:`	`case RTSQ:`
`if (ex) {`	`if (ex) {`
`pc = ca[1];`	`pc = ca[1];`
	`rts = true;`
`if (sub_depth > 0) sub_depth--;`	`if (sub_depth > 0) sub_depth--;`
`}`	`}`
`ca[15] = pc;`	`ca[15] = pc;`
`imm_prefix = 0;`	`imm_prefix = 0;`
`return;`	`return;`

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[/] [thor/] [trunk/] [software/] [emuThor/] [source/] [clsThor.cpp] - Diff between revs 32 and 35