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[/] [tinycpu/] [trunk/] [docs/] [design.md.txt] - Diff between revs 21 and 25
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| Rev 21 |
Rev 25 |
| Line 31... |
Line 31... |
last 1 bit: conditional
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last 1 bit: conditional
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second byte:
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second byte:
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first 1 bit: second portion of condition (if not immediate) (1 for only if false)
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first 1 bit: second portion of condition (if not immediate) (1 for only if false)
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next 1 bit: use extra segment
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next 1 bit: use extra segment
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next 3 bits: other register. If not 3rd register, top bit specifies which register bank, others unused
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next 3 bits: other register. If not 3rd register
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last 3 bits: extra opcode information or third register. such as for ADD it could be target=source+third_register
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last 3 bits: extra opcode information or third register. such as for ADD it could be target=source+third_register
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...or second byte is immediate value
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...or second byte is immediate value
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For opcodes requiring 3 registers but without room, the target opcode is assume to be the second operation. Such as for AND, target=source AND target
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For opcodes requiring 3 registers but without room, the target opcode is assume to be the second operation. Such as for AND, target=source AND target
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