| Line 5... |
Line 5... |
3. fixed 16-bit instruction length
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3. fixed 16-bit instruction length
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4. use a small amount of "rich" instructions to do powerful things
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4. use a small amount of "rich" instructions to do powerful things
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5. 1 instruction per clock cycle
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5. 1 instruction per clock cycle
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Register list:
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Register list:
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r0-r6 general purpose registers
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r0-r5 general purpose registers
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sp stack pointer (represented as r6)
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ip instruction pointer register (represented as r7)
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ip instruction pointer register (represented as r7)
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cs, ds, es, ss segment registers (code segment, data segment, extra segment, stack segment)
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cs, ds, es, ss segment registers (code segment, data segment, extra segment, stack segment)
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tr truth register for conditionals
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tr truth register for conditionals
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general opcode format
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general opcode format
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| Line 19... |
Line 20... |
next 3 bits: (target) register
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next 3 bits: (target) register
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last 1 bit: conditional
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last 1 bit: conditional
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second byte:
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second byte:
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first 1 bit: second portion of condition (if not immediate) (1 for only if false)
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first 1 bit: second portion of condition (if not immediate) (1 for only if false)
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next 1 bit: unused
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next 1 bit: use extra segment
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next 3 bits: other register
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next 3 bits: other register
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last 3 bits: extra opcode information or third register. such as for ADD it could be target=source+third_register
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last 3 bits: extra opcode information or third register. such as for ADD it could be target=source+third_register
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...or second byte is immediate value
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...or second byte is immediate value
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| Line 33... |
Line 34... |
immediates:
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immediates:
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1. move reg, immediate
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1. move reg, immediate
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2. move [reg], immediate
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2. move [reg], immediate
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3. push and move reg, immediate (or call immediate)
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3. push and move reg, immediate (or call immediate)
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4. push immediate
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4. push immediate
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5. jmp immediate
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groups: (limited to 2 registers and no immediates. each group has 8 opcodes)
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groups: (limited to 2 registers and no immediates. each group has 8 opcodes)
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group 1:
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group 1:
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move(store) [reg],reg
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move(store) [reg],reg
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move(load) reg,[reg]
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move(load) reg,[reg]
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out reg1,reg2 (output to port reg1 value reg2)
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out reg1,reg2 (output to port reg1 value reg2)
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in reg1,reg2 (input from port reg2 and store in reg1)
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in reg1,reg2 (input from port reg2 and store in reg1)
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pop reg
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push reg
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move segmentreg,reg
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move reg,segmentreg
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group 2:
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group 2:
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and reg1,reg2 (reg1=reg1 and reg2)
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and reg1,reg2 (reg1=reg1 and reg2)
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or reg, reg
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or reg, reg
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xor reg,reg
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xor reg,reg
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| Line 59... |
Line 64... |
is greater or equal to reg,reg
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is greater or equal to reg,reg
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is less than reg,reg
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is less than reg,reg
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is less than or equal to reg,reg
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is less than or equal to reg,reg
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is equal to reg,reg
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is equal to reg,reg
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is not equal to reg,reg
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is not equal to reg,reg
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equals 0 reg
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not equals 0 reg
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group 4:
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push segmentreg
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pop segmentreg
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push and move reg, reg (or call reg)
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exchange reg,reg
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exchange reg,seg
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clear TR
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Set TR
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group 5:
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increment reg
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decrement reg
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far jmp reg1, reg2 (CS=reg1 and IP=reg2)
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far call reg1,reg2
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far jmp [reg] (first byte is CS, second byte is IP)
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push extended segmentreg, reg (equivalent to push seg; push reg)
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pop extended segmentreg, reg (equivalent to pop reg; pop seg)
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reset processor (will completely reset the processor to starting state, but not RAM or anything else)
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3 register instructions:
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3 register instructions:
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1. add reg1, reg2, reg3 (reg1=reg2+reg3)
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1. add reg1, reg2, reg3 (reg1=reg2+reg3)
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2. sub reg1, reg2, reg3
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2. sub reg1, reg2, reg3
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opcodes used: 12 of 16. 4 more opcodes available. Decide what to do with the room later.
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0 -nop (doesn't do a thing)
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0 -nop (doesn't do a thing)
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1 -move immediate (only uses first byte)
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1 -move immediate (only uses first byte)
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2 -move
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2 -move
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| Line 95... |
Line 122... |
push
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push
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pop
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pop
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move
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move
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add
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add
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sub
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sub
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limitations that shouldn't be passed with instructions
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* Doing 2 memory references
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* pushing a memory reference (equates to 2 memory references)
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Note it is possible however to read and write 16bits at one time to the memory to consecutive addresses.
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segments:
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DS is used in all "normal" memory references
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SS is used in all push and pop instructions
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ES is used when the ExtraSegment bit is set for either push/pop or normal memory references
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CS is only used for fetching instructions
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