URL
https://opencores.org/ocsvn/tinycpu/tinycpu/trunk
[/] [tinycpu/] [trunk/] [src/] [core.vhd] - Diff between revs 21 and 23
Go to most recent revision |
Show entire file |
Details |
Blame |
View Log
| Rev 21 |
Rev 23 |
| Line 82... |
Line 82... |
|
|
type ProcessorState is (
|
type ProcessorState is (
|
ResetProcessor,
|
ResetProcessor,
|
FirstFetch1, --the fetcher needs two clock cycles to catch up
|
FirstFetch1, --the fetcher needs two clock cycles to catch up
|
FirstFetch2,
|
FirstFetch2,
|
|
Firstfetch3,
|
Execute,
|
Execute,
|
WaitForMemory,
|
WaitForMemory,
|
HoldMemory
|
HoldMemory
|
);
|
);
|
signal state: ProcessorState;
|
signal state: ProcessorState;
|
| Line 202... |
Line 203... |
end if;
|
end if;
|
FetchEN <= '1';
|
FetchEN <= '1';
|
elsif state=FirstFetch1 then --we have to let IR get loaded before we can execute.
|
elsif state=FirstFetch1 then --we have to let IR get loaded before we can execute.
|
--regWE <= (others => '0');
|
--regWE <= (others => '0');
|
fetchEN <= '1'; --already enabled, but anyway
|
fetchEN <= '1'; --already enabled, but anyway
|
regWE <= (others => '0');
|
--regWE <= (others => '0');
|
state <= FirstFetch2;
|
|
elsif state=FirstFetch2 then
|
|
state <= Execute;
|
|
IPAddend <= x"02";
|
IPAddend <= x"02";
|
SPAddend <= x"00"; --no addend unless pushing or popping
|
SPAddend <= x"00"; --no addend unless pushing or popping
|
RegWE <= (others => '0');
|
RegWE <= (others => '0');
|
regIn(REGIP) <= IPCarryOut;
|
regIn(REGIP) <= IPCarryOut;
|
regWE(REGIP) <= '1';
|
regWE(REGIP) <= '1';
|
regWE(REGCS) <= '1';
|
regWE(REGCS) <= '1';
|
regIn(REGCS) <= CSCarryOut;
|
regIn(REGCS) <= CSCarryOut;
|
|
state <= Execute;
|
|
elsif state=FirstFetch2 then
|
|
state <= FirstFetch3;
|
|
|
|
elsif state=FirstFetch3 then
|
|
state <= Execute;
|
end if;
|
end if;
|
|
|
|
|
if state=Execute then
|
if state=Execute then
|
fetchEN <= '1';
|
fetchEN <= '1';
|
© copyright 1999-2024
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.