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[/] [tinycpu/] [trunk/] [src/] [registerfile.vhd] - Diff between revs 12 and 19
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Rev 19 |
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Line 17... |
DataOut: out regdatatype
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DataOut: out regdatatype
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);
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);
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end registerfile;
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end registerfile;
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architecture Behavioral of registerfile is
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architecture Behavioral of registerfile is
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type registerstype is array(0 to 15) of std_logic_vector(7 downto 0);
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type registerstype is array(0 to 15) of std_logic_vector(7 downto 0);
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signal registers: registerstype;
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signal registers: registerstype;
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--attribute ram_style : string;
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--attribute ram_style : string;
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--attribute ram_style of registers: signal is "distributed";
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--attribute ram_style of registers: signal is "distributed";
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begin
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begin
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regs:
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regs: for I in 0 to 15 generate
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for I in 0 to 15 generate
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process(WriteEnable(I), DataIn(I), Clock)
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process(WriteEnable(I), DataIn(I), Clock)
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begin
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begin
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if rising_edge(Clock) then
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if rising_edge(Clock) then
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if(WriteEnable(I) = '1') then
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if(WriteEnable(I) = '1') then
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registers(I) <= DataIn(I);
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registers(I) <= DataIn(I);
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