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[/] [tinycpu/] [trunk/] [src/] [registerfile.vhd] - Diff between revs 27 and 28
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--attribute ram_style of registers: signal is "distributed";
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--attribute ram_style of registers: signal is "distributed";
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begin
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begin
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regs: for I in 0 to 15 generate
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regs: for I in 0 to 15 generate
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process(WriteEnable(I), DataIn(I), Clock)
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process(WriteEnable(I), DataIn(I), Clock)
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begin
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begin
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if falling_edge(Clock) then --I really hope this one falling_edge component doesn't bite me in the ass later
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if rising_edge(Clock) then --I really hope this one falling_edge component doesn't bite me in the ass later
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if(WriteEnable(I) = '1') then
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if(WriteEnable(I) = '1') then
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registers(I) <= DataIn(I);
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registers(I) <= DataIn(I);
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end if;
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end if;
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end if;
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end if;
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end process;
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end process;
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DataOut(I) <= registers(I);
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DataOut(I) <= registers(I) when WriteEnable(I)='0' else DataIn(I);
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-- DataOut(I) <= registers(I);
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end generate regs;
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end generate regs;
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end Behavioral;
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end Behavioral;
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