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[/] [tinycpu/] [trunk/] [testbench/] [core_tb.vhd] - Diff between revs 32 and 33
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| Rev 32 |
Rev 33 |
| Line 164... |
Line 164... |
assert( MemAddr=x"0158") report "IP increment is wrong after WaitForAlu" severity error;
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assert( MemAddr=x"0158") report "IP increment is wrong after WaitForAlu" severity error;
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MemIn <= "0101000000000000"; --push r0
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MemIn <= "0101000000000000"; --push r0
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wait for 10 ns;
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wait for 10 ns;
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assert(MemAddr=x"0200" and MemOut=x"0070") report "push is not correct" severity error;
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assert(MemAddr=x"0200" and MemOut=x"0070") report "push is not correct" severity error;
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wait for 10 ns;
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wait for 10 ns;
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MemIn <= "0101000001100001"; --mov r0, SP
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wait for 10 ns;
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assert(Debugr0 = x"02") report "SP is not correct" severity error;
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MemIn <= "0101000000010000"; --pop r0
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MemIn <= "0101000000010000"; --pop r0
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assert(MemAddr=x"015A") report "IP increment is wrong after push" severity error;
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assert(MemAddr=x"015C") report "IP increment is wrong after push" severity error;
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wait for 10 ns;
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wait for 10 ns;
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MemIn <= x"0020"; --the value to be popped into r0
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MemIn <= x"0020"; --the value to be popped into r0
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assert(MemAddr=x"0200") report "Pop is not fetching from correct address" severity error;
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assert(MemAddr=x"0200") report "Pop is not fetching from correct address" severity error;
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wait for 10 ns;
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wait for 10 ns;
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assert(DebugR0=x"20") report "Pop is not assigning to R0 correct" severity error;
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assert(DebugR0=x"20") report "Pop is not assigning to R0 correct" severity error;
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