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[/] [tinycpu/] [trunk/] [testbench/] [registerfile_tb.vhd] - Diff between revs 12 and 14
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Rev 12 |
Rev 14 |
Line 89... |
Line 89... |
WriteEnable(0) <= '0';
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WriteEnable(0) <= '0';
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WriteEnable(1) <= '0';
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WriteEnable(1) <= '0';
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wait for 10 ns;
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wait for 10 ns;
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assert (DataOut(0)=x"12" and DataOut(1)=x"34") report "simultaneous write and read error case 4" severity error;
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assert (DataOut(0)=x"12" and DataOut(1)=x"34") report "simultaneous write and read error case 4" severity error;
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--case 5
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DataIn(0) <= x"55";
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WriteEnable(0) <= '1';
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wait for 10 ns;
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DataIn(0) <= x"77";
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assert (DataOut(0)=x"55") report "Write during read error case 5" severity error;
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wait for 10 ns;
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-- summary of testbench
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-- summary of testbench
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assert false
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assert false
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