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-----------------------------------------------------------------
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-------------------------------------------------------------------------------
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-- Project: Aeternitas
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--
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-- Design: tinyVLIW8 soft-core processor
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-- Author: Oliver Stecklina <stecklina@ihp-microelectronics.com>
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-- Author: Oliver Stecklina <stecklina@ihp-microelectronics.com>
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-- Date: 03.02.2014
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-- Date: 03.02.2014
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-- File: instDecoder.vhd
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-- File: instDecoder.vhd
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-- Design: AeternitasSWUR
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--
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-----------------------------------------------------------------
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-------------------------------------------------------------------------------
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--
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-- Description : This unit is the instruction set decoder of the
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-- Description : This unit is the instruction set decoder of the
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-- embedded 8-bit VLIW processor.
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-- embedded 8-bit VLIW processor.
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-----------------------------------------------------------------
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--
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-- $Log$
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-------------------------------------------------------------------------------
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-----------------------------------------------------------------
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--
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-- Copyright (C) 2015 IHP GmbH, Frankfurt (Oder), Germany
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--
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-- This code is free software. It is licensed under the EUPL, Version 1.1
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-- or - as soon they will be approved by the European Commission - subsequent
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-- versions of the EUPL (the "License").
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-- You may redistribute this code and/or modify it under the terms of this
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-- License.
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-- You may not use this work except in compliance with the License.
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-- You may obtain a copy of the License at:
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--
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-- http://joinup.ec.europa.eu/software/page/eupl/licence-eupl
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--
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-- Unless required by applicable law or agreed to in writing, software
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-- distributed under the License is distributed on an "AS IS" basis,
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-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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-- See the License for the specific language governing permissions and
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-- limitations under the License.
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--
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-------------------------------------------------------------------------------
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library ieee;
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.std_logic_1164.all;
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use ieee.std_logic_arith.all;
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use ieee.std_logic_arith.all;
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