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//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//// ////
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//// ////
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//// divide for 8051 Core ////
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//// divide for 8051 Core ////
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//// ////
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//// ////
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//// This file is part of the 8051 cores project ////
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//// This file is part of the 8051 cores project ////
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//// http://www.opencores.org/cores/8051/ ////
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//// http://www.opencores.org/cores/turb08051/ ////
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//// ////
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//// ////
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//// Description ////
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//// Description ////
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//// Four cycle implementation of division used in alu.v ////
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//// Four cycle implementation of division used in alu.v ////
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//// ////
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//// ////
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//// To Do: ////
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//// To Do: ////
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//// check if compiler does proper optimizations of the code ////
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//// check if compiler does proper optimizations of the code ////
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//// ////
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//// ////
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//// Author(s): ////
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//// Author(s): ////
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//// - Simon Teran, simont@opencores.org ////
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//// - Simon Teran, simont@opencores.org ////
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//// - Marko Mlinar, markom@opencores.org ////
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//// - Marko Mlinar, markom@opencores.org ////
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//// - Dinesh Annayya, dinesha@opencores.org ////
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//// ////
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//// ////
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//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//// ////
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//// ////
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//// Copyright (C) 2001 Authors and OPENCORES.ORG ////
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//// Copyright (C) 2001 Authors and OPENCORES.ORG ////
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//// ////
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//// ////
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// Revision 1.8 2002/09/30 17:15:31 simont
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// Revision 1.8 2002/09/30 17:15:31 simont
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// prepared header
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// prepared header
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//
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//
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//
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//
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// synopsys translate_off
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`include "oc8051_timescale.v"
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// synopsys translate_on
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module oc8051_divide (clk, rst, enable, src1, src2, des1, des2, desOv);
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module oc8051_divide (clk, rst, enable, src1, src2, des1, des2, desOv);
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//
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//
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// this module is part of alu
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// this module is part of alu
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// clk (in)
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// clk (in)
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