| Line 1... |
Line 1... |
//////////////////////////////////////////////////////////////////////
|
//////////////////////////////////////////////////////////////////////
|
//// ////
|
//// ////
|
//// 8051 program status word ////
|
//// 8051 program status word ////
|
//// ////
|
//// ////
|
//// This file is part of the 8051 cores project ////
|
//// This file is part of the 8051 cores project ////
|
//// http://www.opencores.org/cores/8051/ ////
|
//// http://www.opencores.org/cores/turb08051/ ////
|
//// ////
|
//// ////
|
//// Description ////
|
//// Description ////
|
//// program status word ////
|
//// program status word ////
|
//// ////
|
//// ////
|
//// To Do: ////
|
//// To Do: ////
|
//// nothing ////
|
//// nothing ////
|
//// ////
|
//// ////
|
//// Author(s): ////
|
//// Author(s): ////
|
//// - Simon Teran, simont@opencores.org ////
|
//// - Simon Teran, simont@opencores.org ////
|
|
//// - Dinesh Annayya , dinesha@opencores.org ////
|
//// ////
|
//// ////
|
//////////////////////////////////////////////////////////////////////
|
//////////////////////////////////////////////////////////////////////
|
//// ////
|
//// ////
|
//// Copyright (C) 2000 Authors and OPENCORES.ORG ////
|
//// Copyright (C) 2000 Authors and OPENCORES.ORG ////
|
//// ////
|
//// ////
|
| Line 60... |
Line 61... |
// prepared header
|
// prepared header
|
//
|
//
|
//
|
//
|
|
|
|
|
// synopsys translate_off
|
`include "top_defines.v"
|
`include "oc8051_timescale.v"
|
|
// synopsys translate_on
|
|
|
|
`include "oc8051_defines.v"
|
|
|
|
|
|
module oc8051_psw (clk, rst, wr_addr, data_in, wr, wr_bit, data_out, p,
|
module oc8051_psw (clk, rst, wr_addr, data_in, wr, wr_bit, data_out, p,
|
cy_in, ac_in, ov_in, set, bank_sel);
|
cy_in, ac_in, ov_in, set, bank_sel);
|
//
|
//
|
