OpenCores

Rev 2	Rev 76
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`//////////////////////////////////////////////////////////////////////`	`//////////////////////////////////////////////////////////////////////`
`//// ////`	`//// ////`
`//// 8051 data ram ////`	`//// 8051 data ram ////`
`//// ////`	`//// ////`
`//// This file is part of the 8051 cores project ////`	`//// This file is part of the 8051 cores project ////`
`//// http://www.opencores.org/cores/8051/ ////`	`//// http://www.opencores.org/cores/turb08051/ ////`
`//// ////`	`//// ////`
`//// Description ////`	`//// Description ////`
`//// data ram ////`	`//// data ram ////`
`//// ////`	`//// ////`
`//// To Do: ////`	`//// To Do: ////`
`//// nothing ////`	`//// nothing ////`
`//// ////`	`//// ////`
`//// Author(s): ////`	`//// Author(s): ////`
`//// - Simon Teran, simont@opencores.org ////`	`//// - Simon Teran, simont@opencores.org ////`
	`//// - Dinesh Annayya, dinesha@opencores.org ////`
`//// ////`	`//// ////`
`//////////////////////////////////////////////////////////////////////`	`//////////////////////////////////////////////////////////////////////`
`//// ////`	`//// ////`
`//// Copyright (C) 2000 Authors and OPENCORES.ORG ////`	`//// Copyright (C) 2000 Authors and OPENCORES.ORG ////`
`//// ////`	`//// ////`
Line 65...	Line 66...
`// Revision 1.4 2002/09/30 17:33:59 simont`	`// Revision 1.4 2002/09/30 17:33:59 simont`
`// prepared header`	`// prepared header`
`//`	`//`
`//`	`//`

`// synopsys translate_off`
`include "oc8051_timescale.v"
`// synopsys translate_on`

`include "oc8051_defines.v"	`include "top_defines.v"


`module oc8051_ram_top (clk,`	`module oc8051_ram_top (clk,`
`rst,`	`rst,`
`rd_addr,`	`rd_addr,`

Line 1...

//////////////////////////////////////////////////////////////////////

//////////////////////////////////////////////////////////////////////

////                                                              ////

////                                                              ////

////  8051 data ram                                               ////

////  8051 data ram                                               ////

////                                                              ////

////                                                              ////

////  This file is part of the 8051 cores project                 ////

////  This file is part of the 8051 cores project                 ////

////  http://www.opencores.org/cores/8051/                        ////

////  http://www.opencores.org/cores/turb08051/                   ////

////                                                              ////

////                                                              ////

////  Description                                                 ////

////  Description                                                 ////

////   data ram                                                   ////

////   data ram                                                   ////

////                                                              ////

////                                                              ////

////  To Do:                                                      ////

////  To Do:                                                      ////

////   nothing                                                    ////

////   nothing                                                    ////

////                                                              ////

////                                                              ////

////  Author(s):                                                  ////

////  Author(s):                                                  ////

////      - Simon Teran, simont@opencores.org                     ////

////      - Simon Teran, simont@opencores.org                     ////

////      - Dinesh Annayya, dinesha@opencores.org                 ////

////                                                              ////

////                                                              ////

//////////////////////////////////////////////////////////////////////

//////////////////////////////////////////////////////////////////////

////                                                              ////

////                                                              ////

//// Copyright (C) 2000 Authors and OPENCORES.ORG                 ////

//// Copyright (C) 2000 Authors and OPENCORES.ORG                 ////

////                                                              ////

////                                                              ////

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// Revision 1.4  2002/09/30 17:33:59  simont

// Revision 1.4  2002/09/30 17:33:59  simont

// prepared header

// prepared header

//

//

//

//

// synopsys translate_off

`include "oc8051_timescale.v"

// synopsys translate_on

`include "oc8051_defines.v"

`include "top_defines.v"

module oc8051_ram_top (clk,

module oc8051_ram_top (clk,

                       rst,

                       rst,

                       rd_addr,

                       rd_addr,

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[/] [turbo8051/] [trunk/] [rtl/] [8051/] [oc8051_ram_top.v] - Diff between revs 2 and 76