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https://opencores.org/ocsvn/turbo8051/turbo8051/trunk
[/] [turbo8051/] [trunk/] [rtl/] [8051/] [oc8051_tc2.v] - Diff between revs 2 and 76
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//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//// ////
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//// ////
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//// 8051 cores timer/counter2 control ////
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//// 8051 cores timer/counter2 control ////
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//// ////
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//// ////
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//// This file is part of the 8051 cores project ////
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//// This file is part of the 8051 cores project ////
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//// http://www.opencores.org/cores/8051/ ////
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//// http://www.opencores.org/cores/turbo8051/ ////
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//// ////
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//// ////
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//// Description ////
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//// Description ////
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//// timers and counters 2 8051 core ////
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//// timers and counters 2 8051 core ////
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//// ////
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//// ////
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//// To Do: ////
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//// To Do: ////
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//// Nothing ////
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//// Nothing ////
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//// ////
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//// ////
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//// Author(s): ////
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//// Author(s): ////
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//// - Simon Teran, simont@opencores.org ////
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//// - Simon Teran, simont@opencores.org ////
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//// - Dinesh Annayya, dinesha@opencores.org ////
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//// ////
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//// ////
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//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//// ////
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//// ////
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//// Copyright (C) 2000 Authors and OPENCORES.ORG ////
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//// Copyright (C) 2000 Authors and OPENCORES.ORG ////
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//// ////
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//// ////
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// initial import
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// initial import
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//
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//
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//
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//
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//
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//
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`include "oc8051_defines.v"
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`include "top_defines.v"
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//synopsys translate_off
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`include "oc8051_timescale.v"
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//synopsys translate_on
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module oc8051_tc2 (clk, rst,
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module oc8051_tc2 (clk, rst,
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wr_addr,
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wr_addr,
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