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[/] [turbo8051/] [trunk/] [rtl/] [gmac/] [mac/] [g_rx_top.v] - Diff between revs 76 and 77

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Rev 76 Rev 77
Line 81... Line 81...
                cf2rx_rcv_runt_pkt_en,
                cf2rx_rcv_runt_pkt_en,
                cf_macmode,
                cf_macmode,
                mi2rx_crs,
                mi2rx_crs,
                df2rx_dfl_dn,
                df2rx_dfl_dn,
                ap2rx_rx_fifo_err,
                ap2rx_rx_fifo_err,
      //A200 change Port added for crs based flow control
      //for crs based flow control
      phy_crs
      phy_crs
               );
               );
 
 
    input               app_reset_n;
    input               app_reset_n;
    input               phy_rx_clk;
    input               phy_rx_clk;
Line 127... Line 127...
    input  [7:0]        cf2df_dfl_single_rx;
    input  [7:0]        cf2df_dfl_single_rx;
    input               ap2rx_rx_fifo_err;
    input               ap2rx_rx_fifo_err;
    input               mi2rx_crs;
    input               mi2rx_crs;
    output              df2rx_dfl_dn;
    output              df2rx_dfl_dn;
 
 
    //A200 change Port added for crs based flow control
    //for crs based flow control
    input            phy_crs;
    input            phy_crs;
 
 
 
 
 
 
    g_rx_fsm u_rx_fsm(
    g_rx_fsm u_rx_fsm(
Line 177... Line 177...
              .cf2rx_rx_ch_en(cf2rx_rx_ch_en),
              .cf2rx_rx_ch_en(cf2rx_rx_ch_en),
              .cf2rx_strp_pad_en(cf2rx_strp_pad_en),
              .cf2rx_strp_pad_en(cf2rx_strp_pad_en),
              .cf2rx_snd_crc(cf2rx_snd_crc),
              .cf2rx_snd_crc(cf2rx_snd_crc),
              .cf2rx_rcv_runt_pkt_en(cf2rx_rcv_runt_pkt_en),
              .cf2rx_rcv_runt_pkt_en(cf2rx_rcv_runt_pkt_en),
              .cf2rx_gigabit_xfr(cf_macmode),
              .cf2rx_gigabit_xfr(cf_macmode),
         //A200 change Port added for crs based flow control
         //for crs based flow control
         .phy_crs(phy_crs)
         .phy_crs(phy_crs)
              );
              );
 
 
 
 
  g_rx_crc32 u_rx_crc32 (
  g_rx_crc32 u_rx_crc32 (
Line 197... Line 197...
              .mi2rc_rx_byte(mi2rx_rx_byte)
              .mi2rc_rx_byte(mi2rx_rx_byte)
              );
              );
 
 
 
 
  g_deferral_rx U_deferral_rx (
  g_deferral_rx U_deferral_rx (
//0503 Changed .port names to match g_deferral_rx
 
            .rx_dfl_dn(df2rx_dfl_dn),
            .rx_dfl_dn(df2rx_dfl_dn),
            .dfl_single(cf2df_dfl_single_rx),
            .dfl_single(cf2df_dfl_single_rx),
            .rx_dv(phy_rx_dv),
            .rx_dv(phy_rx_dv),
//0504      .phy_rx_er(phy_rx_er),
 
            .rx_clk(phy_rx_clk),
            .rx_clk(phy_rx_clk),
            .reset_n(rx_reset_n));
            .reset_n(rx_reset_n));
 
 
  endmodule
  endmodule
 
 
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