Line 61... |
Line 61... |
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// Application RX FIFO Interface
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// Application RX FIFO Interface
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app_txfifo_wren_i,
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app_txfifo_wren_i,
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app_txfifo_wrdata_i,
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app_txfifo_wrdata_i,
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app_txfifo_full_o,
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app_txfifo_full_o,
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app_txfifo_afull_o,
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app_txfifo_space_o,
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app_txfifo_space_o,
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// Application TX FIFO Interface
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// Application TX FIFO Interface
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app_rxfifo_rden_i,
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app_rxfifo_rden_i,
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app_rxfifo_empty_o,
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app_rxfifo_empty_o,
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app_rxfifo_aempty_o,
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app_rxfifo_cnt_o,
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app_rxfifo_cnt_o,
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app_rxfifo_rdata_o,
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app_rxfifo_rdata_o,
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// Conntrol Bus Sync with Application Clock
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// Conntrol Bus Sync with Application Clock
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reg_cs,
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reg_cs,
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Line 138... |
Line 140... |
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// Application RX FIFO Interface
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// Application RX FIFO Interface
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input app_txfifo_wren_i;
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input app_txfifo_wren_i;
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input [8:0] app_txfifo_wrdata_i;
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input [8:0] app_txfifo_wrdata_i;
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output app_txfifo_full_o;
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output app_txfifo_full_o;
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output app_txfifo_afull_o;
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output [AW:0] app_txfifo_space_o;
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output [AW:0] app_txfifo_space_o;
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// Application TX FIFO Interface
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// Application TX FIFO Interface
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input app_rxfifo_rden_i;
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input app_rxfifo_rden_i;
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output app_rxfifo_empty_o;
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output app_rxfifo_empty_o;
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output app_rxfifo_aempty_o;
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output [AW:0] app_rxfifo_cnt_o;
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output [AW:0] app_rxfifo_cnt_o;
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output [8:0] app_rxfifo_rdata_o;
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output [8:0] app_rxfifo_rdata_o;
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// Conntrol Bus Sync with Application Clock
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// Conntrol Bus Sync with Application Clock
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//---------------------------------
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//---------------------------------
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Line 283... |
Line 287... |
.wr_clk (app_clk),
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.wr_clk (app_clk),
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.wr_reset_n (app_reset_n),
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.wr_reset_n (app_reset_n),
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.wr_en (app_txfifo_wren_i),
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.wr_en (app_txfifo_wren_i),
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.wr_data (app_txfifo_wrdata_i),
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.wr_data (app_txfifo_wrdata_i),
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.full (app_txfifo_full_o), // sync'ed to wr_clk
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.full (app_txfifo_full_o), // sync'ed to wr_clk
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.afull (app_txfifo_afull_o), // sync'ed to wr_clk
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.wr_total_free_space (app_txfifo_space_o),
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.wr_total_free_space (app_txfifo_space_o),
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.rd_clk (phy_tx_clk),
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.rd_clk (phy_tx_clk),
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.rd_reset_n (tx_reset_n),
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.rd_reset_n (tx_reset_n),
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.rd_en (tx_fifo_rd),
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.rd_en (tx_fifo_rd),
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.empty (tx_fifo_empty), // sync'ed to rd_clk
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.empty (tx_fifo_empty), // sync'ed to rd_clk
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.aempty (tx_fifo_aempty), // sync'ed to rd_clk
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.rd_total_aval (tx_fifo_aval),
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.rd_total_aval (tx_fifo_aval),
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.rd_data (tx_fifo_data)
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.rd_data (tx_fifo_data)
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);
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);
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async_fifo #(W,DP,0,0) u_mac_rxfifo (
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async_fifo #(W,DP,0,0) u_mac_rxfifo (
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.wr_clk (phy_rx_clk),
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.wr_clk (phy_rx_clk),
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.wr_reset_n (rx_reset_n),
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.wr_reset_n (rx_reset_n),
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.wr_en (rx_fifo_wr_o),
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.wr_en (rx_fifo_wr_o),
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.wr_data (rx_fifo_data_o),
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.wr_data (rx_fifo_data_o),
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.full (rx_fifo_full_i), // sync'ed to wr_clk
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.full (rx_fifo_full_i), // sync'ed to wr_clk
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.afull (rx_fifo_afull_i), // sync'ed to wr_clk
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.wr_total_free_space (),
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.wr_total_free_space (),
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.rd_clk (app_clk),
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.rd_clk (app_clk),
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.rd_reset_n (app_reset_n),
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.rd_reset_n (app_reset_n),
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.rd_en (app_rxfifo_rden_i),
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.rd_en (app_rxfifo_rden_i),
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.empty (app_rxfifo_empty_o), // sync'ed to rd_clk
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.empty (app_rxfifo_empty_o), // sync'ed to rd_clk
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.aempty (app_rxfifo_aempty_o), // sync'ed to rd_clk
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.rd_total_aval (app_rxfifo_cnt_o),
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.rd_total_aval (app_rxfifo_cnt_o),
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.rd_data (app_rxfifo_rdata_o)
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.rd_data (app_rxfifo_rdata_o)
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);
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);
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