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[/] [turbo8051/] [trunk/] [rtl/] [lib/] [dble_reg.v] - Diff between revs 11 and 76

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////  Author(s):                                                  ////
////  Author(s):                                                  ////
////      - Dinesh Annayya, dinesha@opencores.org                 ////
////      - Dinesh Annayya, dinesha@opencores.org                 ////
////                                                              ////
////                                                              ////
 
////  Revision : Mar 2, 2011                                      //// 
 
////                                                              ////
//////////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////////
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//// Copyright (C) 2000 Authors and OPENCORES.ORG                 ////
//// Copyright (C) 2000 Authors and OPENCORES.ORG                 ////
////                                                              ////
////                                                              ////
//// This source file may be used and distributed without         ////
//// This source file may be used and distributed without         ////
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/***************************************************************
/***************************************************************
  Description:
  Description:
        Synchronizes the pulse from one clock to another
        Synchronizes the pulse from one clock to another
 * clock domain
 * clock domain
***********************************************************************/
***********************************************************************/
//`timescale 1ns/100ps
 
module half_dup_dble_reg (
module half_dup_dble_reg (
                   //outputs
                   //outputs
                   sync_out_pulse,
                   sync_out_pulse,
                   //inputs
                   //inputs
                   in_pulse,
                   in_pulse,

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