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[/] [turbo8051/] [trunk/] [rtl/] [lib/] [dble_reg.v] - Diff between revs 11 and 76
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//// nothing ////
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//// nothing ////
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//// ////
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//// ////
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//// Author(s): ////
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//// Author(s): ////
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//// - Dinesh Annayya, dinesha@opencores.org ////
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//// - Dinesh Annayya, dinesha@opencores.org ////
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//// ////
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//// ////
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//// Revision : Mar 2, 2011 ////
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//// ////
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//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//// ////
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//// ////
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//// Copyright (C) 2000 Authors and OPENCORES.ORG ////
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//// Copyright (C) 2000 Authors and OPENCORES.ORG ////
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//// ////
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//// ////
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//// This source file may be used and distributed without ////
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//// This source file may be used and distributed without ////
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/***************************************************************
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/***************************************************************
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Description:
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Description:
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Synchronizes the pulse from one clock to another
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Synchronizes the pulse from one clock to another
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* clock domain
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* clock domain
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***********************************************************************/
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***********************************************************************/
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//`timescale 1ns/100ps
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module half_dup_dble_reg (
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module half_dup_dble_reg (
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//outputs
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//outputs
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sync_out_pulse,
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sync_out_pulse,
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//inputs
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//inputs
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in_pulse,
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in_pulse,
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