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[/] [turbo8051/] [trunk/] [rtl/] [lib/] [wb_crossbar.v] - Diff between revs 11 and 32
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| Rev 11 |
Rev 32 |
| Line 152... |
Line 152... |
// where valid data is expected on the [DAT_I(63..0)] signal
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// where valid data is expected on the [DAT_I(63..0)] signal
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// array during READ cycles, and where it is placed on the
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// array during READ cycles, and where it is placed on the
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// [DAT_O(63..0)] signal array during WRITE cycles.
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// [DAT_O(63..0)] signal array during WRITE cycles.
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// Also see the [DAT_I(63..0)], [DAT_O(63..0)] and [STB_O]
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// Also see the [DAT_I(63..0)], [DAT_O(63..0)] and [STB_O]
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// signal descriptions.
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// signal descriptions.
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input [(WB_SLAVE * BE_WD)-1:0] wbd_be_slave; // Byte Enable
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output [(WB_SLAVE * BE_WD)-1:0] wbd_be_slave; // Byte Enable
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// SEL_O(7..0) The select output array [SEL_O(7..0)] indicates
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// SEL_O(7..0) The select output array [SEL_O(7..0)] indicates
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// where valid data is expected on the [DAT_I(63..0)] signal
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// where valid data is expected on the [DAT_I(63..0)] signal
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// array during READ cycles, and where it is placed on the
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// array during READ cycles, and where it is placed on the
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// [DAT_O(63..0)] signal array during WRITE cycles.
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// [DAT_O(63..0)] signal array during WRITE cycles.
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// Also see the [DAT_I(63..0)], [DAT_O(63..0)] and [STB_O]
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// Also see the [DAT_I(63..0)], [DAT_O(63..0)] and [STB_O]
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