URL
https://opencores.org/ocsvn/turbo8051/turbo8051/trunk
[/] [turbo8051/] [trunk/] [rtl/] [lib/] [wb_interface.v] - Diff between revs 11 and 34
Go to most recent revision |
Show entire file |
Details |
Blame |
View Log
| Rev 11 |
Rev 34 |
| Line 112... |
Line 112... |
reg [2:0] state_d ;
|
reg [2:0] state_d ;
|
reg [7:0] preq_len ; // pending request length in bytes
|
reg [7:0] preq_len ; // pending request length in bytes
|
reg wbd_we_o ; // westbone write req
|
reg wbd_we_o ; // westbone write req
|
reg [23:0] wbd_adr_o ; // westnone address
|
reg [23:0] wbd_adr_o ; // westnone address
|
reg dma_ack_o ; // dma ack
|
reg dma_ack_o ; // dma ack
|
reg dma_done_o ; // dma ack
|
|
reg [7:0] twbtrans ; // total westbone transaction
|
reg [7:0] twbtrans ; // total westbone transaction
|
reg dma_wr_o ; // dma write request
|
reg dma_wr_o ; // dma write request
|
reg dma_rd_o ; // dma read request
|
reg dma_rd_o ; // dma read request
|
reg [31:0] temp_data ; // temp holding data
|
reg [31:0] temp_data ; // temp holding data
|
reg [1:0] be_sof ; // Byte enable starting alignment
|
reg [1:0] be_sof ; // Byte enable starting alignment
|
© copyright 1999-2024
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.