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Line 61... |
# Loading work.oc8051_divide
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# Loading work.oc8051_divide
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# Loading work.oc8051_ram_top
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# Loading work.oc8051_ram_top
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# Loading work.oc8051_ram_256x8_two_bist
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# Loading work.oc8051_ram_256x8_two_bist
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# Loading work.oc8051_alu_src_sel
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# Loading work.oc8051_alu_src_sel
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# Loading work.oc8051_comp
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# Loading work.oc8051_comp
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# Loading work.oc8051_rom
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# Loading work.oc8051_cy_select
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# Loading work.oc8051_cy_select
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# Loading work.oc8051_indi_addr
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# Loading work.oc8051_indi_addr
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# Loading work.oc8051_memory_interface
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# Loading work.oc8051_memory_interface
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# Loading work.oc8051_sfr
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# Loading work.oc8051_sfr
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# Loading work.oc8051_acc
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# Loading work.oc8051_acc
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| Line 88... |
Line 87... |
# Loading work.acdc_check
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# Loading work.acdc_check
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# Loading work.internal_logic
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# Loading work.internal_logic
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# Loading work.AT45DB321
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# Loading work.AT45DB321
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# Loading work.tb_glbl
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# Loading work.tb_glbl
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# Loading work.bit_register
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# Loading work.bit_register
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# ** Warning: (vsim-WLF-5000) WLF file currently in use: vsim.wlf
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# File in use by: Hostname: ProcessID: 14
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# Attempting to use alternate WLF file "./wlftdf5ms9".
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# ** Warning: (vsim-WLF-5001) Could not open WLF file: vsim.wlf
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# Using alternate file: ./wlftdf5ms9
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# ** Warning: (vsim-3017) ../../rtl/uart/uart_core.v(211): [TFMPC] - Too few port connections. Expected 14, found 12.
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# ** Warning: (vsim-3017) ../../rtl/uart/uart_core.v(211): [TFMPC] - Too few port connections. Expected 14, found 12.
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# Region: /tb_top/u_core/u_uart_core/u_rxfifo
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# Region: /tb_top/u_core/u_uart_core/u_rxfifo
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# ** Warning: (vsim-3722) ../../rtl/uart/uart_core.v(211): [TFMPC] - Missing connection for port 'afull'.
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# ** Warning: (vsim-3722) ../../rtl/uart/uart_core.v(211): [TFMPC] - Missing connection for port 'afull'.
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# ** Warning: (vsim-3722) ../../rtl/uart/uart_core.v(211): [TFMPC] - Missing connection for port 'aempty'.
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# ** Warning: (vsim-3722) ../../rtl/uart/uart_core.v(211): [TFMPC] - Missing connection for port 'aempty'.
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# ** Warning: (vsim-3017) ../../rtl/uart/uart_core.v(227): [TFMPC] - Too few port connections. Expected 14, found 12.
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# ** Warning: (vsim-3017) ../../rtl/uart/uart_core.v(227): [TFMPC] - Too few port connections. Expected 14, found 12.
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| Line 122... |
Line 116... |
############################################
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############################################
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# Config-Write: Id: 2 Addr = 0004, Cfg. Data = 06000000
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# Config-Write: Id: 2 Addr = 0004, Cfg. Data = 06000000
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# Config-Write: Id: 2 Addr = 0000, Cfg. Data = 80020240
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# Config-Write: Id: 2 Addr = 0000, Cfg. Data = 80020240
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# Config-Write: Id: 2 Addr = 0004, Cfg. Data = d8000000
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# Config-Write: Id: 2 Addr = 0004, Cfg. Data = d8000000
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# Config-Write: Id: 2 Addr = 0000, Cfg. Data = 801a0201
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# Config-Write: Id: 2 Addr = 0000, Cfg. Data = 801a0201
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# 6815000 : tb_top.spi_sector_errase : Sending Sector Errase for Address : 000000
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# 6775000 : tb_top.spi_sector_errase : Sending Sector Errase for Address : 000000
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# NOTE : Sector erase cycle has begun
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# NOTE : Sector erase cycle has begun
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# Config-Write: Id: 2 Addr = 0004, Cfg. Data = 05000000
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# Config-Write: Id: 2 Addr = 0004, Cfg. Data = 05000000
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# Config-Write: Id: 2 Addr = 0000, Cfg. Data = 80020200
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# Config-Write: Id: 2 Addr = 0000, Cfg. Data = 80020200
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# NOTE : Only a Read Status Register instruction will be valid
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# NOTE : Only a Read Status Register instruction will be valid
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# Config-Write: Id: 2 Addr = 0000, Cfg. Data = 80220240
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# Config-Write: Id: 2 Addr = 0000, Cfg. Data = 80220240
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| Line 485... |
Line 479... |
# =========
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# =========
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# Test Status: TEST PASSED
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# Test Status: TEST PASSED
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# =========
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# =========
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#
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#
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# ** Note: $finish : ../../verif/lib/tb_glbl.v(64)
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# ** Note: $finish : ../../verif/lib/tb_glbl.v(64)
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# Time: 2968996 ns Iteration: 0 Instance: /tb_top
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# Time: 2968956 ns Iteration: 0 Instance: /tb_top
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# Time: 2968956 ns Iteration: 0 Instance: /tb_top
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# Time: 2968956 ns Iteration: 0 Instance: /tb_top
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