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Reading /mtitcl/vsim/pref.tcl
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Reading D:/Microsemi/Libero_v10.1/Model/tcl/vsim/pref.tcl
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# 10.2b
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# 10.1b
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# vsim +uart_test_1 -do run.do -c tb_top
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# vsim +uart_test_1 -do run.do -c tb_top
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# // Questa Sim-64
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# // ModelSim ACTEL 10.1b Apr 27 2012
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# // Version 10.2b linux_x86_64 May 16 2013
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# //
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# //
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# // Copyright 1991-2013 Mentor Graphics Corporation
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# // Copyright 1991-2012 Mentor Graphics Corporation
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# // All Rights Reserved.
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# // All Rights Reserved.
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# //
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# //
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# // THIS WORK CONTAINS TRADE SECRET AND PROPRIETARY INFORMATION
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# // THIS WORK CONTAINS TRADE SECRET AND PROPRIETARY INFORMATION
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# // WHICH IS THE PROPERTY OF MENTOR GRAPHICS CORPORATION OR ITS
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# // WHICH IS THE PROPERTY OF MENTOR GRAPHICS CORPORATION OR ITS
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# // LICENSORS AND IS SUBJECT TO LICENSE TERMS.
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# // LICENSORS AND IS SUBJECT TO LICENSE TERMS.
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# //
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# //
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# Loading sv_std.std
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# Loading sv_std.std
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# Loading work.tb_top(fast)
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# Loading work.tb_top
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# Loading work.oc8051_top(fast)
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# Loading work.digital_core
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# Loading work.tb_eth_top(fast)
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# Loading work.clkgen
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# Loading work.AT45DB321(fast)
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# Loading work.clk_ctl
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# Loading work.wb_crossbar
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# Loading work.g_mac_top
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# Loading work.g_dpath_ctrl
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# Loading work.g_eth_parser
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# Loading work.g_mac_core
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# Loading work.g_rx_top
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# Loading work.g_rx_fsm
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# Loading work.half_dup_dble_reg
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# Loading work.g_rx_crc32
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# Loading work.g_deferral_rx
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# Loading work.g_md_intf
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# Loading work.g_tx_top
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# Loading work.g_deferral
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# Loading work.g_tx_fsm
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# Loading work.g_tx_crc32
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# Loading work.toggle_sync
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# Loading work.g_cfg_mgmt
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# Loading work.s2f_sync
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# Loading work.generic_register
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# Loading work.req_register
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# Loading work.stat_counter
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# Loading work.generic_intr_stat_reg
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# Loading work.g_mii_intf
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# Loading work.async_fifo
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# Loading work.wb_rd_mem2mem
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# Loading work.wb_wr_mem2mem
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# Loading work.uart_core
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# Loading work.uart_cfg
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# Loading work.stat_register
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# Loading work.uart_txfsm
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# Loading work.uart_rxfsm
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# Loading work.double_sync_low
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# Loading work.spi_core
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# Loading work.spi_if
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# Loading work.spi_ctl
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# Loading work.spi_cfg
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# Loading work.oc8051_top
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# Loading work.oc8051_decoder
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# Loading work.oc8051_alu
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# Loading work.oc8051_multiply
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# Loading work.oc8051_divide
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# Loading work.oc8051_ram_top
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# Loading work.oc8051_ram_256x8_two_bist
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# Loading work.oc8051_alu_src_sel
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# Loading work.oc8051_comp
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# Loading work.oc8051_cy_select
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# Loading work.oc8051_indi_addr
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# Loading work.oc8051_memory_interface
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# Loading work.oc8051_sfr
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# Loading work.oc8051_acc
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# Loading work.oc8051_b_register
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# Loading work.oc8051_sp
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# Loading work.oc8051_dptr
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# Loading work.oc8051_psw
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# Loading work.oc8051_ports
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# Loading work.oc8051_int
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# Loading work.oc8051_tc
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# Loading work.oc8051_tc2
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# Loading work.oc8051_xrom
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# Loading work.oc8051_xram
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# Loading work.tb_eth_top
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# Loading work.tb_mii
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# Loading work.tb_rmii
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# Loading work.uart_agent
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# Loading work.m25p20
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# Loading work.memory_access
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# Loading work.acdc_check
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# Loading work.internal_logic
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# Loading work.AT45DB321
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# Loading work.tb_glbl
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# Loading work.bit_register
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# ** Warning: (vsim-PLI-3003) ../tb/tb_top.v(397): [TOFD] - System task or function '$shm_open' is not defined.
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#
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# Region: /tb_top
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# ** Warning: (vsim-PLI-3003) ../tb/tb_top.v(398): [TOFD] - System task or function '$shm_probe' is not defined.
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#
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# Region: /tb_top
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# ** Warning: (vsim-3017) ../tb/tb_top.v(235): [TFMPC] - Too few port connections. Expected 50, found 44.
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#
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# Region: /tb_top/u_core
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# ** Warning: (vsim-3015) ../tb/tb_top.v(235): [PCDPC] - Port size (8 or 8) does not match connection size (4) for port 'phy_txd'. The port definition is at: ../../rtl/core/digital_core.v(29).
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#
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# Region: /tb_top/u_core
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# ** Warning: (vsim-3015) ../tb/tb_top.v(235): [PCDPC] - Port size (8 or 8) does not match connection size (4) for port 'phy_rxd'. The port definition is at: ../../rtl/core/digital_core.v(35).
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#
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# Region: /tb_top/u_core
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# ** Warning: (vsim-3722) ../tb/tb_top.v(235): [TFMPC] - Missing connection for port 'scan_mode'.
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#
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# ** Warning: (vsim-3722) ../tb/tb_top.v(235): [TFMPC] - Missing connection for port 'scan_enable'.
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#
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# ** Warning: (vsim-3722) ../tb/tb_top.v(235): [TFMPC] - Missing connection for port 'mdio_clk'.
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#
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# ** Warning: (vsim-3722) ../tb/tb_top.v(235): [TFMPC] - Missing connection for port 'mdio_in'.
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#
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# ** Warning: (vsim-3722) ../tb/tb_top.v(235): [TFMPC] - Missing connection for port 'mdio_out'.
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#
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# ** Warning: (vsim-3722) ../tb/tb_top.v(235): [TFMPC] - Missing connection for port 'mdio_out_en'.
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#
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# ** Warning: (vsim-3017) ../../rtl/uart/uart_core.v(214): [TFMPC] - Too few port connections. Expected 14, found 12.
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#
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# Region: /tb_top/u_core/u_uart_core/u_rxfifo
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# ** Warning: (vsim-3722) ../../rtl/uart/uart_core.v(214): [TFMPC] - Missing connection for port 'afull'.
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#
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# ** Warning: (vsim-3722) ../../rtl/uart/uart_core.v(214): [TFMPC] - Missing connection for port 'aempty'.
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#
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# ** Warning: (vsim-3017) ../../rtl/uart/uart_core.v(230): [TFMPC] - Too few port connections. Expected 14, found 12.
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#
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# Region: /tb_top/u_core/u_uart_core/u_txfifo
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# ** Warning: (vsim-3722) ../../rtl/uart/uart_core.v(230): [TFMPC] - Missing connection for port 'afull'.
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#
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# ** Warning: (vsim-3722) ../../rtl/uart/uart_core.v(230): [TFMPC] - Missing connection for port 'aempty'.
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#
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# do run.do
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# do run.do
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# i : 00
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# i : 00
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# i : 00
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# i : 00
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# i : 00
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# i : 00
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# i : 00
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# i : 00
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Line 29... |
Line 140... |
# i : 00
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# i : 00
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# i : 00
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# i : 00
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# i : 00
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# i : 00
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# NOTE : Load memory with Initial delivery content
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# NOTE : Load memory with Initial delivery content
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# NOTE : Initial Load End
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# NOTE : Initial Load End
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# --> Dumpping the design
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# NOTE: COMMUNICATION (RE)STARTED
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# NOTE: COMMUNICATION (RE)STARTED
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# Config-Write: Id: 3 Addr = 0000, Cfg. Data = 00000017
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# Config-Write: Id: 3 Addr = 0000, Cfg. Data = 00000017
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#
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#
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# ... Writing char 36 ...
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# ... Writing char 24 ...
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# ... Write data 24 to UART done cnt : 1 ...
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# ... Write data 24 to UART done cnt : 1 ...
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#
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#
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#
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#
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# ... Writing char 129 ...
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# ... Writing char 81 ...
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# (tb_top.tb_uart.read_char_chk.loop_2) Data match 24
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# (tb_top.tb_uart.read_char_chk.loop_2) Data match 24
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# ... Read Data from UART done cnt : 1...
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# ... Read Data from UART done cnt : 1...
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# ... Write data 81 to UART done cnt : 2 ...
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# ... Write data 81 to UART done cnt : 2 ...
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#
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#
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#
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#
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# ... Writing char 9 ...
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# ... Writing char 09 ...
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# (tb_top.tb_uart.read_char_chk.loop_2) Data match 81
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# (tb_top.tb_uart.read_char_chk.loop_2) Data match 81
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# ... Read Data from UART done cnt : 2...
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# ... Read Data from UART done cnt : 2...
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# ... Write data 09 to UART done cnt : 3 ...
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# ... Write data 09 to UART done cnt : 3 ...
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#
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#
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#
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#
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# ... Writing char 99 ...
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# ... Writing char 63 ...
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# (tb_top.tb_uart.read_char_chk.loop_2) Data match 09
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# (tb_top.tb_uart.read_char_chk.loop_2) Data match 09
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# ... Read Data from UART done cnt : 3...
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# ... Read Data from UART done cnt : 3...
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# ... Write data 63 to UART done cnt : 4 ...
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# ... Write data 63 to UART done cnt : 4 ...
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#
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#
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#
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#
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# ... Writing char 13 ...
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# ... Writing char 0d ...
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# (tb_top.tb_uart.read_char_chk.loop_2) Data match 63
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# (tb_top.tb_uart.read_char_chk.loop_2) Data match 63
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# ... Read Data from UART done cnt : 4...
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# ... Read Data from UART done cnt : 4...
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# ... Write data 0d to UART done cnt : 5 ...
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# ... Write data 0d to UART done cnt : 5 ...
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#
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#
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#
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#
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# ... Writing char 141 ...
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# ... Writing char 8d ...
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# (tb_top.tb_uart.read_char_chk.loop_2) Data match 0d
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# (tb_top.tb_uart.read_char_chk.loop_2) Data match 0d
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# ... Read Data from UART done cnt : 5...
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# ... Read Data from UART done cnt : 5...
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# ... Write data 8d to UART done cnt : 6 ...
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# ... Write data 8d to UART done cnt : 6 ...
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#
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#
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#
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#
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# ... Writing char 101 ...
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# ... Writing char 65 ...
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# (tb_top.tb_uart.read_char_chk.loop_2) Data match 8d
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# (tb_top.tb_uart.read_char_chk.loop_2) Data match 8d
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# ... Read Data from UART done cnt : 6...
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# ... Read Data from UART done cnt : 6...
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# ... Write data 65 to UART done cnt : 7 ...
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# ... Write data 65 to UART done cnt : 7 ...
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#
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#
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#
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#
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# ... Writing char 18 ...
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# ... Writing char 12 ...
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# (tb_top.tb_uart.read_char_chk.loop_2) Data match 65
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# (tb_top.tb_uart.read_char_chk.loop_2) Data match 65
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# ... Read Data from UART done cnt : 7...
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# ... Read Data from UART done cnt : 7...
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# ... Write data 12 to UART done cnt : 8 ...
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# ... Write data 12 to UART done cnt : 8 ...
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#
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#
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#
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#
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# ... Writing char 1 ...
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# ... Writing char 01 ...
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# (tb_top.tb_uart.read_char_chk.loop_2) Data match 12
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# (tb_top.tb_uart.read_char_chk.loop_2) Data match 12
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# ... Read Data from UART done cnt : 8...
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# ... Read Data from UART done cnt : 8...
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# ... Write data 01 to UART done cnt : 9 ...
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# ... Write data 01 to UART done cnt : 9 ...
|
#
|
#
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#
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#
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# ... Writing char 13 ...
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# ... Writing char 0d ...
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# (tb_top.tb_uart.read_char_chk.loop_2) Data match 01
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# (tb_top.tb_uart.read_char_chk.loop_2) Data match 01
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# ... Read Data from UART done cnt : 9...
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# ... Read Data from UART done cnt : 9...
|
# ... Write data 0d to UART done cnt : 10 ...
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# ... Write data 0d to UART done cnt : 10 ...
|
#
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#
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#
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#
|
# ... Writing char 118 ...
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# ... Writing char 76 ...
|
# (tb_top.tb_uart.read_char_chk.loop_2) Data match 0d
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# (tb_top.tb_uart.read_char_chk.loop_2) Data match 0d
|
# ... Read Data from UART done cnt : 10...
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# ... Read Data from UART done cnt : 10...
|
# ... Write data 76 to UART done cnt : 11 ...
|
# ... Write data 76 to UART done cnt : 11 ...
|
#
|
#
|
#
|
#
|
# ... Writing char 61 ...
|
# ... Writing char 3d ...
|
# (tb_top.tb_uart.read_char_chk.loop_2) Data match 76
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# (tb_top.tb_uart.read_char_chk.loop_2) Data match 76
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# ... Read Data from UART done cnt : 11...
|
# ... Read Data from UART done cnt : 11...
|
# ... Write data 3d to UART done cnt : 12 ...
|
# ... Write data 3d to UART done cnt : 12 ...
|
#
|
#
|
#
|
#
|
# ... Writing char 237 ...
|
# ... Writing char ed ...
|
# (tb_top.tb_uart.read_char_chk.loop_2) Data match 3d
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# (tb_top.tb_uart.read_char_chk.loop_2) Data match 3d
|
# ... Read Data from UART done cnt : 12...
|
# ... Read Data from UART done cnt : 12...
|
# ... Write data ed to UART done cnt : 13 ...
|
# ... Write data ed to UART done cnt : 13 ...
|
#
|
#
|
#
|
#
|
# ... Writing char 140 ...
|
# ... Writing char 8c ...
|
# (tb_top.tb_uart.read_char_chk.loop_2) Data match ed
|
# (tb_top.tb_uart.read_char_chk.loop_2) Data match ed
|
# ... Read Data from UART done cnt : 13...
|
# ... Read Data from UART done cnt : 13...
|
# ... Write data 8c to UART done cnt : 14 ...
|
# ... Write data 8c to UART done cnt : 14 ...
|
#
|
#
|
#
|
#
|
# ... Writing char 249 ...
|
# ... Writing char f9 ...
|
# (tb_top.tb_uart.read_char_chk.loop_2) Data match 8c
|
# (tb_top.tb_uart.read_char_chk.loop_2) Data match 8c
|
# ... Read Data from UART done cnt : 14...
|
# ... Read Data from UART done cnt : 14...
|
# ... Write data f9 to UART done cnt : 15 ...
|
# ... Write data f9 to UART done cnt : 15 ...
|
#
|
#
|
#
|
#
|
# ... Writing char 198 ...
|
# ... Writing char c6 ...
|
# (tb_top.tb_uart.read_char_chk.loop_2) Data match f9
|
# (tb_top.tb_uart.read_char_chk.loop_2) Data match f9
|
# ... Read Data from UART done cnt : 15...
|
# ... Read Data from UART done cnt : 15...
|
# ... Write data c6 to UART done cnt : 16 ...
|
# ... Write data c6 to UART done cnt : 16 ...
|
#
|
#
|
#
|
#
|
# ... Writing char 197 ...
|
# ... Writing char c5 ...
|
# (tb_top.tb_uart.read_char_chk.loop_2) Data match c6
|
# (tb_top.tb_uart.read_char_chk.loop_2) Data match c6
|
# ... Read Data from UART done cnt : 16...
|
# ... Read Data from UART done cnt : 16...
|
# ... Write data c5 to UART done cnt : 17 ...
|
# ... Write data c5 to UART done cnt : 17 ...
|
#
|
#
|
#
|
#
|
# ... Writing char 170 ...
|
# ... Writing char aa ...
|
# (tb_top.tb_uart.read_char_chk.loop_2) Data match c5
|
# (tb_top.tb_uart.read_char_chk.loop_2) Data match c5
|
# ... Read Data from UART done cnt : 17...
|
# ... Read Data from UART done cnt : 17...
|
# ... Write data aa to UART done cnt : 18 ...
|
# ... Write data aa to UART done cnt : 18 ...
|
#
|
#
|
#
|
#
|
# ... Writing char 229 ...
|
# ... Writing char e5 ...
|
# (tb_top.tb_uart.read_char_chk.loop_2) Data match aa
|
# (tb_top.tb_uart.read_char_chk.loop_2) Data match aa
|
# ... Read Data from UART done cnt : 18...
|
# ... Read Data from UART done cnt : 18...
|
# ... Write data e5 to UART done cnt : 19 ...
|
# ... Write data e5 to UART done cnt : 19 ...
|
#
|
#
|
#
|
#
|
# ... Writing char 119 ...
|
# ... Writing char 77 ...
|
# (tb_top.tb_uart.read_char_chk.loop_2) Data match e5
|
# (tb_top.tb_uart.read_char_chk.loop_2) Data match e5
|
# ... Read Data from UART done cnt : 19...
|
# ... Read Data from UART done cnt : 19...
|
# ... Write data 77 to UART done cnt : 20 ...
|
# ... Write data 77 to UART done cnt : 20 ...
|
#
|
#
|
#
|
#
|
# ... Writing char 18 ...
|
# ... Writing char 12 ...
|
# (tb_top.tb_uart.read_char_chk.loop_2) Data match 77
|
# (tb_top.tb_uart.read_char_chk.loop_2) Data match 77
|
# ... Read Data from UART done cnt : 20...
|
# ... Read Data from UART done cnt : 20...
|
# ... Write data 12 to UART done cnt : 21 ...
|
# ... Write data 12 to UART done cnt : 21 ...
|
#
|
#
|
#
|
#
|
# ... Writing char 143 ...
|
# ... Writing char 8f ...
|
# (tb_top.tb_uart.read_char_chk.loop_2) Data match 12
|
# (tb_top.tb_uart.read_char_chk.loop_2) Data match 12
|
# ... Read Data from UART done cnt : 21...
|
# ... Read Data from UART done cnt : 21...
|
# ... Write data 8f to UART done cnt : 22 ...
|
# ... Write data 8f to UART done cnt : 22 ...
|
#
|
#
|
#
|
#
|
# ... Writing char 242 ...
|
# ... Writing char f2 ...
|
# (tb_top.tb_uart.read_char_chk.loop_2) Data match 8f
|
# (tb_top.tb_uart.read_char_chk.loop_2) Data match 8f
|
# ... Read Data from UART done cnt : 22...
|
# ... Read Data from UART done cnt : 22...
|
# ... Write data f2 to UART done cnt : 23 ...
|
# ... Write data f2 to UART done cnt : 23 ...
|
#
|
#
|
#
|
#
|
# ... Writing char 206 ...
|
# ... Writing char ce ...
|
# (tb_top.tb_uart.read_char_chk.loop_2) Data match f2
|
# (tb_top.tb_uart.read_char_chk.loop_2) Data match f2
|
# ... Read Data from UART done cnt : 23...
|
# ... Read Data from UART done cnt : 23...
|
# ... Write data ce to UART done cnt : 24 ...
|
# ... Write data ce to UART done cnt : 24 ...
|
#
|
#
|
#
|
#
|
# ... Writing char 232 ...
|
# ... Writing char e8 ...
|
# (tb_top.tb_uart.read_char_chk.loop_2) Data match ce
|
# (tb_top.tb_uart.read_char_chk.loop_2) Data match ce
|
# ... Read Data from UART done cnt : 24...
|
# ... Read Data from UART done cnt : 24...
|
# ... Write data e8 to UART done cnt : 25 ...
|
# ... Write data e8 to UART done cnt : 25 ...
|
#
|
#
|
#
|
#
|
# ... Writing char 197 ...
|
# ... Writing char c5 ...
|
# (tb_top.tb_uart.read_char_chk.loop_2) Data match e8
|
# (tb_top.tb_uart.read_char_chk.loop_2) Data match e8
|
# ... Read Data from UART done cnt : 25...
|
# ... Read Data from UART done cnt : 25...
|
# ... Write data c5 to UART done cnt : 26 ...
|
# ... Write data c5 to UART done cnt : 26 ...
|
#
|
#
|
#
|
#
|
# ... Writing char 92 ...
|
# ... Writing char 5c ...
|
# (tb_top.tb_uart.read_char_chk.loop_2) Data match c5
|
# (tb_top.tb_uart.read_char_chk.loop_2) Data match c5
|
# ... Read Data from UART done cnt : 26...
|
# ... Read Data from UART done cnt : 26...
|
# ... Write data 5c to UART done cnt : 27 ...
|
# ... Write data 5c to UART done cnt : 27 ...
|
#
|
#
|
#
|
#
|
# ... Writing char 189 ...
|
# ... Writing char bd ...
|
# (tb_top.tb_uart.read_char_chk.loop_2) Data match 5c
|
# (tb_top.tb_uart.read_char_chk.loop_2) Data match 5c
|
# ... Read Data from UART done cnt : 27...
|
# ... Read Data from UART done cnt : 27...
|
# ... Write data bd to UART done cnt : 28 ...
|
# ... Write data bd to UART done cnt : 28 ...
|
#
|
#
|
#
|
#
|
# ... Writing char 45 ...
|
# ... Writing char 2d ...
|
# (tb_top.tb_uart.read_char_chk.loop_2) Data match bd
|
# (tb_top.tb_uart.read_char_chk.loop_2) Data match bd
|
# ... Read Data from UART done cnt : 28...
|
# ... Read Data from UART done cnt : 28...
|
# ... Write data 2d to UART done cnt : 29 ...
|
# ... Write data 2d to UART done cnt : 29 ...
|
#
|
#
|
#
|
#
|
# ... Writing char 101 ...
|
# ... Writing char 65 ...
|
# (tb_top.tb_uart.read_char_chk.loop_2) Data match 2d
|
# (tb_top.tb_uart.read_char_chk.loop_2) Data match 2d
|
# ... Read Data from UART done cnt : 29...
|
# ... Read Data from UART done cnt : 29...
|
# ... Write data 65 to UART done cnt : 30 ...
|
# ... Write data 65 to UART done cnt : 30 ...
|
#
|
#
|
#
|
#
|
# ... Writing char 99 ...
|
# ... Writing char 63 ...
|
# (tb_top.tb_uart.read_char_chk.loop_2) Data match 65
|
# (tb_top.tb_uart.read_char_chk.loop_2) Data match 65
|
# ... Read Data from UART done cnt : 30...
|
# ... Read Data from UART done cnt : 30...
|
# ... Write data 63 to UART done cnt : 31 ...
|
# ... Write data 63 to UART done cnt : 31 ...
|
#
|
#
|
#
|
#
|
# ... Writing char 10 ...
|
# ... Writing char 0a ...
|
# (tb_top.tb_uart.read_char_chk.loop_2) Data match 63
|
# (tb_top.tb_uart.read_char_chk.loop_2) Data match 63
|
# ... Read Data from UART done cnt : 31...
|
# ... Read Data from UART done cnt : 31...
|
# ... Write data 0a to UART done cnt : 32 ...
|
# ... Write data 0a to UART done cnt : 32 ...
|
#
|
#
|
#
|
#
|
# ... Writing char 128 ...
|
# ... Writing char 80 ...
|
# (tb_top.tb_uart.read_char_chk.loop_2) Data match 0a
|
# (tb_top.tb_uart.read_char_chk.loop_2) Data match 0a
|
# ... Read Data from UART done cnt : 32...
|
# ... Read Data from UART done cnt : 32...
|
# ... Write data 80 to UART done cnt : 33 ...
|
# ... Write data 80 to UART done cnt : 33 ...
|
#
|
#
|
#
|
#
|
# ... Writing char 32 ...
|
# ... Writing char 20 ...
|
# (tb_top.tb_uart.read_char_chk.loop_2) Data match 80
|
# (tb_top.tb_uart.read_char_chk.loop_2) Data match 80
|
# ... Read Data from UART done cnt : 33...
|
# ... Read Data from UART done cnt : 33...
|
# ... Write data 20 to UART done cnt : 34 ...
|
# ... Write data 20 to UART done cnt : 34 ...
|
#
|
#
|
#
|
#
|
# ... Writing char 170 ...
|
# ... Writing char aa ...
|
# (tb_top.tb_uart.read_char_chk.loop_2) Data match 20
|
# (tb_top.tb_uart.read_char_chk.loop_2) Data match 20
|
# ... Read Data from UART done cnt : 34...
|
# ... Read Data from UART done cnt : 34...
|
# ... Write data aa to UART done cnt : 35 ...
|
# ... Write data aa to UART done cnt : 35 ...
|
#
|
#
|
#
|
#
|
# ... Writing char 157 ...
|
# ... Writing char 9d ...
|
# (tb_top.tb_uart.read_char_chk.loop_2) Data match aa
|
# (tb_top.tb_uart.read_char_chk.loop_2) Data match aa
|
# ... Read Data from UART done cnt : 35...
|
# ... Read Data from UART done cnt : 35...
|
# ... Write data 9d to UART done cnt : 36 ...
|
# ... Write data 9d to UART done cnt : 36 ...
|
#
|
#
|
#
|
#
|
# ... Writing char 150 ...
|
# ... Writing char 96 ...
|
# (tb_top.tb_uart.read_char_chk.loop_2) Data match 9d
|
# (tb_top.tb_uart.read_char_chk.loop_2) Data match 9d
|
# ... Read Data from UART done cnt : 36...
|
# ... Read Data from UART done cnt : 36...
|
# ... Write data 96 to UART done cnt : 37 ...
|
# ... Write data 96 to UART done cnt : 37 ...
|
#
|
#
|
#
|
#
|
# ... Writing char 19 ...
|
# ... Writing char 13 ...
|
# (tb_top.tb_uart.read_char_chk.loop_2) Data match 96
|
# (tb_top.tb_uart.read_char_chk.loop_2) Data match 96
|
# ... Read Data from UART done cnt : 37...
|
# ... Read Data from UART done cnt : 37...
|
# ... Write data 13 to UART done cnt : 38 ...
|
# ... Write data 13 to UART done cnt : 38 ...
|
#
|
#
|
#
|
#
|
# ... Writing char 13 ...
|
# ... Writing char 0d ...
|
# (tb_top.tb_uart.read_char_chk.loop_2) Data match 13
|
# (tb_top.tb_uart.read_char_chk.loop_2) Data match 13
|
# ... Read Data from UART done cnt : 38...
|
# ... Read Data from UART done cnt : 38...
|
# ... Write data 0d to UART done cnt : 39 ...
|
# ... Write data 0d to UART done cnt : 39 ...
|
#
|
#
|
#
|
#
|
# ... Writing char 83 ...
|
# ... Writing char 53 ...
|
# (tb_top.tb_uart.read_char_chk.loop_2) Data match 0d
|
# (tb_top.tb_uart.read_char_chk.loop_2) Data match 0d
|
# ... Read Data from UART done cnt : 39...
|
# ... Read Data from UART done cnt : 39...
|
# ... Write data 53 to UART done cnt : 40 ...
|
# ... Write data 53 to UART done cnt : 40 ...
|
#
|
#
|
# (tb_top.tb_uart.read_char_chk.loop_2) Data match 53
|
# (tb_top.tb_uart.read_char_chk.loop_2) Data match 53
|
Line 302... |
Line 414... |
#
|
#
|
# =========
|
# =========
|
# Test Status: TEST PASSED
|
# Test Status: TEST PASSED
|
# =========
|
# =========
|
#
|
#
|
# ** Note: $finish : ../lib/tb_glbl.v(70)
|
|
# Time: 157871 ns Iteration: 0 Instance: /tb_top
|
|