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[/] [turbo8051/] [trunk/] [verif/] [tb/] [tb_top.v] - Diff between revs 33 and 50

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Line 45... Line 45...
 
 
`include "tb_defines.v"
`include "tb_defines.v"
 
 
module tb_top;
module tb_top;
 
 
//--------------------------------------------------------------
 
// Target ID Mapping
 
// 4'b0100 -- MAC core
 
// 4'b0011 -- UART
 
// 4'b0010 -- SPI core
 
// 4'b0001 -- External RAM
 
// 4'b0000 -- External ROM
 
//--------------------------------------------------------------
 
`define ADDR_SPACE_MAC  4'b0100
 
`define ADDR_SPACE_UART 4'b0011
 
`define ADDR_SPACE_SPI  4'b0010
 
`define ADDR_SPACE_RAM  4'b0001
 
`define ADDR_SPACE_ROM  4'b0000
 
 
 
reg    reset_n;
reg    reset_n;
reg    reset;
reg    reset;
reg    xtal_clk;
reg    xtal_clk;
reg    ref_clk_125;
reg    ref_clk_125;
Line 162... Line 149...
//---------------------------------------
//---------------------------------------
wire   [15:0] wb_xram_adr        ; // data-ram address
wire   [15:0] wb_xram_adr        ; // data-ram address
wire          wb_xram_ack        ; // data-ram acknowlage
wire          wb_xram_ack        ; // data-ram acknowlage
wire          wb_xram_err        ; // data-ram error
wire          wb_xram_err        ; // data-ram error
wire          wb_xram_wr         ; // data-ram error
wire          wb_xram_wr         ; // data-ram error
wire   [7:0]  wb_xram_rdata      ; // ram data input
wire   [3:0]  wb_xram_be         ; // data-ram error
wire   [7:0]  wb_xram_wdata      ; // ram data input
wire   [31:0] wb_xram_rdata      ; // ram data input
 
wire   [31:0] wb_xram_wdata      ; // ram data input
 
 
wire          wb_xram_stb        ; // data-ram strobe
wire          wb_xram_stb        ; // data-ram strobe
wire          wb_xram_cyc        ; // data-ram cycle
wire          wb_xram_cyc        ; // data-ram cycle
 
 
//----------------------------------------
//----------------------------------------
Line 234... Line 222...
         // External RAM interface
         // External RAM interface
               .wb_xram_adr        (wb_xram_adr        ),
               .wb_xram_adr        (wb_xram_adr        ),
               .wb_xram_ack        (wb_xram_ack        ),
               .wb_xram_ack        (wb_xram_ack        ),
               .wb_xram_err        (wb_xram_err        ),
               .wb_xram_err        (wb_xram_err        ),
               .wb_xram_wr         (wb_xram_wr         ),
               .wb_xram_wr         (wb_xram_wr         ),
 
               .wb_xram_be         (wb_xram_be         ),
               .wb_xram_rdata      (wb_xram_rdata      ),
               .wb_xram_rdata      (wb_xram_rdata      ),
               .wb_xram_wdata      (wb_xram_wdata      ),
               .wb_xram_wdata      (wb_xram_wdata      ),
 
 
               .wb_xram_stb        (wb_xram_stb        ),
               .wb_xram_stb        (wb_xram_stb        ),
               .wb_xram_cyc        (wb_xram_cyc        ),
               .wb_xram_cyc        (wb_xram_cyc        ),
Line 266... Line 255...
//
//
oc8051_xram oc8051_xram1 (
oc8051_xram oc8051_xram1 (
          .clk               (app_clk       ),
          .clk               (app_clk       ),
          .rst               (!reset_n      ),
          .rst               (!reset_n      ),
          .wr                (wb_xram_wr    ),
          .wr                (wb_xram_wr    ),
 
          .be                (wb_xram_be    ),
          .addr              (wb_xram_adr   ),
          .addr              (wb_xram_adr   ),
          .data_in           (wb_xram_wdata ),
          .data_in           (wb_xram_wdata ),
          .data_out          (wb_xram_rdata ),
          .data_out          (wb_xram_rdata ),
          .ack               (wb_xram_ack   ),
          .ack               (wb_xram_ack   ),
          .stb               (wb_xram_stb   )
          .stb               (wb_xram_stb   )

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