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https://opencores.org/ocsvn/turbo8051/turbo8051/trunk
[/] [turbo8051/] [trunk/] [verif/] [tb/] [tb_top.v] - Diff between revs 53 and 56
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| Rev 53 |
Rev 56 |
| Line 108... |
Line 108... |
// Reg Bus Interface Signal
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// Reg Bus Interface Signal
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//---------------------------------
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//---------------------------------
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reg reg_cs ;
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reg reg_cs ;
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reg [3:0] reg_id ;
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reg [3:0] reg_id ;
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reg reg_wr ;
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reg reg_wr ;
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reg [12:0] reg_addr ;
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reg [14:0] reg_addr ;
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reg [31:0] reg_wdata ;
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reg [31:0] reg_wdata ;
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reg [3:0] reg_be ;
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reg [3:0] reg_be ;
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// Outputs
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// Outputs
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wire [31:0] reg_rdata ;
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wire [31:0] reg_rdata ;
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| Line 172... |
Line 172... |
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// Reg Bus Interface Signal
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// Reg Bus Interface Signal
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. ext_reg_cs (reg_cs ),
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. ext_reg_cs (reg_cs ),
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. ext_reg_tid (reg_id ),
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. ext_reg_tid (reg_id ),
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. ext_reg_wr (reg_wr ),
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. ext_reg_wr (reg_wr ),
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. ext_reg_addr (reg_addr[12:0] ),
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. ext_reg_addr (reg_addr[14:0] ),
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. ext_reg_wdata (reg_wdata ),
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. ext_reg_wdata (reg_wdata ),
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. ext_reg_be (reg_be ),
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. ext_reg_be (reg_be ),
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// Outputs
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// Outputs
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. ext_reg_rdata (reg_rdata ),
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. ext_reg_rdata (reg_rdata ),
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| Line 417... |
Line 417... |
gmac_test1();
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gmac_test1();
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else if ( $test$plusargs("uart_test_1") )
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else if ( $test$plusargs("uart_test_1") )
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uart_test1();
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uart_test1();
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else if ( $test$plusargs("spi_test_1") )
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else if ( $test$plusargs("spi_test_1") )
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spi_test1();
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spi_test1();
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else begin
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else if ( !$test$plusargs("gmac_test_2") ) begin
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// 8051 Test Cases
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// 8051 Test Cases
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#80000000
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#80000000
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$display("time ",$time, "\n faulire: end of time\n \n");
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$display("time ",$time, "\n faulire: end of time\n \n");
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end
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end
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