OpenCores
URL https://opencores.org/ocsvn/turbo8051/turbo8051/trunk

Subversion Repositories turbo8051

[/] [turbo8051/] [trunk/] [verif/] [tb/] [tb_top.v] - Diff between revs 61 and 73

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 61 Rev 73
Line 99... Line 99...
  uart_clk_16x = 1'b0;
  uart_clk_16x = 1'b0;
  forever #(UART_REF_CLK_PERIOD/2.0) uart_clk_16x = ~uart_clk_16x;
  forever #(UART_REF_CLK_PERIOD/2.0) uart_clk_16x = ~uart_clk_16x;
end
end
 
 
 
 
wire [7:0]   phy_txd            ;
wire [3:0]   phy_txd            ;
wire [7:0]   phy_rxd            ;
wire [3:0]   phy_rxd            ;
 
 
//---------------------------------
//---------------------------------
// Reg Bus Interface Signal
// Reg Bus Interface Signal
//---------------------------------
//---------------------------------
reg                reg_cs     ;
reg                reg_cs     ;

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.