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Rev 31 |
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`define TV80_CORE_PATH tb_top.tv80s_inst.i_tv80_core
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`define TV80_INSTRUCTION_DECODE
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module tb_top;
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module tb_top;
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reg clk;
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reg clk;
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reg reset_n;
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reg reset_n;
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reg wait_n;
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reg wait_n;
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.addr (A[7:0]),
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.addr (A[7:0]),
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.DO (do[7:0]));
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.DO (do[7:0]));
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initial
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initial
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begin
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begin
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//dumpon;
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dumpon;
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clear_ram;
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clear_ram;
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reset_n = 0;
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reset_n = 0;
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wait_n = 1;
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wait_n = 1;
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int_n = 1;
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int_n = 1;
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nmi_n = 1;
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nmi_n = 1;
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$readmemh (`PROGRAM_FILE, tb_top.rom.mem);
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$readmemh (`PROGRAM_FILE, tb_top.rom.mem);
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repeat (20) @(negedge clk);
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repeat (20) @(negedge clk);
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reset_n = 1;
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reset_n = 1;
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end
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end
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`ifdef TV80_INSTRUCTION_DECODE
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reg [7:0] state;
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initial
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state = 0;
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always @(posedge clk)
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begin : inst_decode
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if ((`TV80_CORE_PATH.mcycle[6:0] == 1) &&
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(`TV80_CORE_PATH.tstate[6:0] == 8))
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begin
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op_decode.decode (`TV80_CORE_PATH.IR[7:0], state);
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end
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else if (`TV80_CORE_PATH.mcycle[6:0] != 1)
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state = 0;
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end
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`endif
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`include "env_tasks.v"
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`include "env_tasks.v"
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endmodule // tb_top
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endmodule // tb_top
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