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https://opencores.org/ocsvn/tv80/tv80/trunk
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`define TV80_CORE_PATH tb_top.tv80s_inst.i_tv80_core
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`define TV80_CORE_PATH tb_top.tv80s_inst.i_tv80_core
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`define TV80_INSTRUCTION_DECODE
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module tb_top;
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module tb_top;
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reg clk;
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reg clk;
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reg reset_n;
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reg reset_n;
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busrq_n = 1;
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busrq_n = 1;
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$readmemh (`PROGRAM_FILE, tb_top.rom.mem);
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$readmemh (`PROGRAM_FILE, tb_top.rom.mem);
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repeat (20) @(negedge clk);
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repeat (20) @(negedge clk);
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reset_n = 1;
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reset_n = 1;
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end
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end
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/*
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always
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begin
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while (mreq_n) @(posedge clk);
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wait_n <= #1 0;
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@(posedge clk);
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wait_n <= #1 1;
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while (!mreq_n) @(posedge clk);
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end
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*/
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`ifdef TV80_INSTRUCTION_DECODE
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`ifdef TV80_INSTRUCTION_DECODE
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reg [7:0] state;
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reg [7:0] state;
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initial
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initial
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state = 0;
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state = 0;
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