| Line 24... |
Line 24... |
|
|
// incoming config interface to
|
// incoming config interface to
|
// read/write processor memory
|
// read/write processor memory
|
input cfgi_irdy,
|
input cfgi_irdy,
|
output cfgi_trdy,
|
output cfgi_trdy,
|
input [14:0] cfgi_addr,
|
input [12:0] cfgi_addr,
|
input cfgi_write,
|
input cfgi_write,
|
input [31:0] cfgi_wr_data,
|
input [31:0] cfgi_wr_data,
|
output [31:0] cfgi_rd_data,
|
output [31:0] cfgi_rd_data,
|
|
|
// outgoing config interface to system
|
// outgoing config interface to system
|
| Line 159... |
Line 159... |
.b_addr (13'h0),
|
.b_addr (13'h0),
|
.b_wdata (32'h0),
|
.b_wdata (32'h0),
|
|
|
);
|
);
|
*/
|
*/
|
lcfg_memctl memctl
|
lcfg_memctl #(.mem_asz(13)) memctl
|
(/*AUTOINST*/
|
(/*AUTOINST*/
|
// Outputs
|
// Outputs
|
.a_wait_n (ram_wait_n), // Templated
|
.a_wait_n (ram_wait_n), // Templated
|
.a_rdata (ram_rd_data), // Templated
|
.a_rdata (ram_rd_data), // Templated
|
.b_wait_n (), // Templated
|
.b_wait_n (), // Templated
|
| Line 182... |
Line 182... |
.b_wr_n (1'b1), // Templated
|
.b_wr_n (1'b1), // Templated
|
.b_addr (13'h0), // Templated
|
.b_addr (13'h0), // Templated
|
.b_wdata (32'h0), // Templated
|
.b_wdata (32'h0), // Templated
|
.lcfg_init (lcfg_init),
|
.lcfg_init (lcfg_init),
|
.cfgi_irdy (cfgi_irdy),
|
.cfgi_irdy (cfgi_irdy),
|
.cfgi_addr (cfgi_addr[14:0]),
|
.cfgi_addr (cfgi_addr[12:0]),
|
.cfgi_write (cfgi_write),
|
.cfgi_write (cfgi_write),
|
.cfgi_wr_data (cfgi_wr_data[31:0]),
|
.cfgi_wr_data (cfgi_wr_data[31:0]));
|
.test_resume_h (test_resume_h));
|
|
|
|
// DMA not needed
|
|
// Need GP interrupt register for timer
|
|
|
|
assign cfg_addr = { reg_addr1, reg_addr0 };
|
|
assign cfg_wr_data = { reg_wr_data3, reg_wr_data2, reg_wr_data1, reg_wr_data0 };
|
|
|
|
/* lcfg_cfgo_driver AUTO_TEMPLATE
|
/* lcfg_cfgo_driver AUTO_TEMPLATE
|
(
|
(
|
.cd_wdata (dout[7:0]),
|
.cd_wdata (dout[7:0]),
|
);
|
);
|
