URL
https://opencores.org/ocsvn/tv80/tv80/trunk
[/] [tv80/] [trunk/] [rtl/] [core/] [tv80_alu.v] - Diff between revs 84 and 90
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| Rev 84 |
Rev 90 |
| Line 56... |
Line 56... |
input [3:0] A;
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input [3:0] A;
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input [3:0] B;
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input [3:0] B;
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input Sub;
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input Sub;
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input Carry_In;
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input Carry_In;
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begin
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begin
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AddSub4 = { 1'b0, A } + { 1'b0, (Sub)?~B:B } + Carry_In;
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AddSub4 = { 1'b0, A } + { 1'b0, (Sub)?~B:B } + {4'h0,Carry_In};
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end
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end
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endfunction // AddSub4
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endfunction // AddSub4
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function [3:0] AddSub3;
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function [3:0] AddSub3;
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input [2:0] A;
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input [2:0] A;
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input [2:0] B;
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input [2:0] B;
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input Sub;
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input Sub;
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input Carry_In;
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input Carry_In;
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begin
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begin
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AddSub3 = { 1'b0, A } + { 1'b0, (Sub)?~B:B } + Carry_In;
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AddSub3 = { 1'b0, A } + { 1'b0, (Sub)?~B:B } + {3'h0,Carry_In};
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end
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end
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endfunction // AddSub4
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endfunction // AddSub4
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function [1:0] AddSub1;
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function [1:0] AddSub1;
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input A;
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input A;
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input B;
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input B;
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input Sub;
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input Sub;
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input Carry_In;
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input Carry_In;
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begin
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begin
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AddSub1 = { 1'b0, A } + { 1'b0, (Sub)?~B:B } + Carry_In;
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AddSub1 = { 1'b0, A } + { 1'b0, (Sub)?~B:B } + {1'h0,Carry_In};
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end
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end
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endfunction // AddSub4
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endfunction // AddSub4
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// AddSub variables (temporary signals)
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// AddSub variables (temporary signals)
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reg UseCarry;
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reg UseCarry;
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