| Line 22... |
Line 22... |
// TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
|
// TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
|
// SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
// SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
|
|
module tv80_core (/*AUTOARG*/
|
module tv80_core (/*AUTOARG*/
|
// Outputs
|
// Outputs
|
m1_n, iorq, no_read, write, rfsh_n, halt_n, busak_n, A, dout, mc, ts,
|
m1_n, iorq, no_read, write, rfsh_n, halt_n, busak_n, A, dout, mc,
|
intcycle_n, IntE, stop,
|
ts, intcycle_n, IntE, stop,
|
// Inputs
|
// Inputs
|
reset_n, clk, cen, wait_n, int_n, nmi_n, busrq_n, dinst, di
|
reset_n, clk, cen, wait_n, int_n, nmi_n, busrq_n, dinst, di
|
);
|
);
|
// Beginning of automatic inputs (from unused autoinst inputs)
|
// Beginning of automatic inputs (from unused autoinst inputs)
|
// End of automatics
|
// End of automatics
|
| Line 736... |
Line 736... |
case (Special_LD[1:0])
|
case (Special_LD[1:0])
|
2'b00 :
|
2'b00 :
|
begin
|
begin
|
ACC <= #1 I;
|
ACC <= #1 I;
|
F[Flag_P] <= #1 IntE_FF2;
|
F[Flag_P] <= #1 IntE_FF2;
|
|
F[Flag_Z] <= (I == 0);
|
|
F[Flag_S] <= I[7];
|
|
F[Flag_H] <= 0;
|
|
F[Flag_N] <= 0;
|
end
|
end
|
|
|
2'b01 :
|
2'b01 :
|
begin
|
begin
|
`ifdef TV80_REFRESH
|
`ifdef TV80_REFRESH
|
ACC <= #1 R;
|
ACC <= #1 R;
|
`else
|
`else
|
ACC <= #1 0;
|
ACC <= #1 0;
|
`endif
|
`endif
|
F[Flag_P] <= #1 IntE_FF2;
|
F[Flag_P] <= #1 IntE_FF2;
|
|
F[Flag_Z] <= (I == 0);
|
|
F[Flag_S] <= I[7];
|
|
F[Flag_H] <= 0;
|
|
F[Flag_N] <= 0;
|
end
|
end
|
|
|
2'b10 :
|
2'b10 :
|
I <= #1 ACC;
|
I <= #1 ACC;
|
|
|
