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[/] [uart/] [trunk/] [clkUnit.vhd] - Diff between revs 7 and 8
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| Rev 7 |
Rev 8 |
| Line 20... |
Line 20... |
--===========================================================================--
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--===========================================================================--
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-------------------------------------------------------------------------------
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-------------------------------------------------------------------------------
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-- Revision list
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-- Revision list
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-- Version Author Date Changes
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-- Version Author Date Changes
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--
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--
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-- 0.1 Ovidiu Lupas 15 January 2000 New model
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-- 1.0 Ovidiu Lupas 15 January 2000 New model
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-- 1.1 Ovidiu Lupas 28 May 2000 EnableRx/EnableTx ratio corrected
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-- olupas@opencores.org
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-- olupas@opencores.org
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-------------------------------------------------------------------------------
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-------------------------------------------------------------------------------
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-- Description : Generates the Baud clock and enable signals for RX & TX
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-- Description : Generates the Baud clock and enable signals for RX & TX
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-- units.
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-- units.
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-------------------------------------------------------------------------------
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-------------------------------------------------------------------------------
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Line 119... |
end if;
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end if;
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case Cnt16 is
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case Cnt16 is
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when "01111" =>
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when "01111" =>
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tmpEnTX <= '1';
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tmpEnTX <= '1';
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Cnt16 := Cnt16 + CntOne;
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Cnt16 := Cnt16 + CntOne;
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when "10010" =>
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when "10001" =>
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Cnt16 := "00000";
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Cnt16 := "00000";
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tmpEnTX <= '0';
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when others =>
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when others =>
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tmpEnTX <= '0';
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tmpEnTX <= '0';
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end case;
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end case;
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end if;
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end if;
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end process;
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end process;
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