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[/] [uart16550/] [trunk/] [rtl/] [verilog/] [uart_debug_if.v] - Diff between revs 65 and 79
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Rev 79 |
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//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//
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//
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// CVS Revision History
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// CVS Revision History
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//
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//
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// $Log: not supported by cvs2svn $
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// $Log: not supported by cvs2svn $
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// Revision 1.3 2001/12/19 08:40:03 mohor
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// Warnings fixed (unused signals removed).
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//
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// Revision 1.2 2001/12/12 22:17:30 gorban
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// Revision 1.2 2001/12/12 22:17:30 gorban
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// some synthesis bugs fixed
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// some synthesis bugs fixed
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//
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//
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// Revision 1.1 2001/12/04 21:14:16 gorban
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// Revision 1.1 2001/12/04 21:14:16 gorban
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// committed the debug interface file
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// committed the debug interface file
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Line 66... |
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// synopsys translate_off
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// synopsys translate_off
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`include "timescale.v"
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`include "timescale.v"
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// synopsys translate_on
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// synopsys translate_on
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`include "uart_defines.v"
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//`include "uart_defines.v"
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module uart_debug_if (/*AUTOARG*/
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module uart_debug_if (/*AUTOARG*/
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// Outputs
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// Outputs
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wb_dat32_o,
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wb_dat32_o,
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// Inputs
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// Inputs
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