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[/] [uart16550/] [trunk/] [rtl/] [verilog/] [uart_rfifo.v] - Diff between revs 87 and 88

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Rev 87 Rev 88
Line 58... Line 58...
//////////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////////
//
//
// CVS Revision History
// CVS Revision History
//
//
// $Log: not supported by cvs2svn $
// $Log: not supported by cvs2svn $
 
// Revision 1.3  2003/06/11 16:37:47  gorban
 
// This fixes errors in some cases when data is being read and put to the FIFO at the same time. Patch is submitted by Scott Furman. Update is very recommended.
 
//
// Revision 1.2  2002/07/29 21:16:18  gorban
// Revision 1.2  2002/07/29 21:16:18  gorban
// The uart_defines.v file is included again in sources.
// The uart_defines.v file is included again in sources.
//
//
// Revision 1.1  2002/07/22 23:02:23  gorban
// Revision 1.1  2002/07/22 23:02:23  gorban
// Bug Fixes:
// Bug Fixes:
Line 205... Line 208...
        if (wb_rst_i)
        if (wb_rst_i)
        begin
        begin
                top             <= #1 0;
                top             <= #1 0;
                bottom          <= #1 1'b0;
                bottom          <= #1 1'b0;
                count           <= #1 0;
                count           <= #1 0;
 
                fifo[0] <= #1 0;
 
                fifo[1] <= #1 0;
 
                fifo[2] <= #1 0;
 
                fifo[3] <= #1 0;
 
                fifo[4] <= #1 0;
 
                fifo[5] <= #1 0;
 
                fifo[6] <= #1 0;
 
                fifo[7] <= #1 0;
 
                fifo[8] <= #1 0;
 
                fifo[9] <= #1 0;
 
                fifo[10] <= #1 0;
 
                fifo[11] <= #1 0;
 
                fifo[12] <= #1 0;
 
                fifo[13] <= #1 0;
 
                fifo[14] <= #1 0;
 
                fifo[15] <= #1 0;
        end
        end
        else
        else
        if (fifo_reset) begin
        if (fifo_reset) begin
                top             <= #1 0;
                top             <= #1 0;
                bottom          <= #1 1'b0;
                bottom          <= #1 1'b0;
                count           <= #1 0;
                count           <= #1 0;
 
                fifo[0] <= #1 0;
 
                fifo[1] <= #1 0;
 
                fifo[2] <= #1 0;
 
                fifo[3] <= #1 0;
 
                fifo[4] <= #1 0;
 
                fifo[5] <= #1 0;
 
                fifo[6] <= #1 0;
 
                fifo[7] <= #1 0;
 
                fifo[8] <= #1 0;
 
                fifo[9] <= #1 0;
 
                fifo[10] <= #1 0;
 
                fifo[11] <= #1 0;
 
                fifo[12] <= #1 0;
 
                fifo[13] <= #1 0;
 
                fifo[14] <= #1 0;
 
                fifo[15] <= #1 0;
        end
        end
  else
  else
        begin
        begin
                case ({push, pop})
                case ({push, pop})
                2'b10 : if (count<fifo_depth)  // overrun condition
                2'b10 : if (count<fifo_depth)  // overrun condition

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