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//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//
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//
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// CVS Revision History
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// CVS Revision History
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//
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//
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// $Log: not supported by cvs2svn $
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// $Log: not supported by cvs2svn $
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// Revision 1.11 2001/10/29 17:00:46 gorban
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// fixed parity sending and tx_fifo resets over- and underrun
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//
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// Revision 1.10 2001/10/20 09:58:40 gorban
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// Revision 1.10 2001/10/20 09:58:40 gorban
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// Small synopsis fixes
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// Small synopsis fixes
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//
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//
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// Revision 1.9 2001/08/24 21:01:12 mohor
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// Revision 1.9 2001/08/24 21:01:12 mohor
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// Things connected to parity changed.
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// Things connected to parity changed.
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`include "timescale.v"
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`include "timescale.v"
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// synopsys translate_on
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// synopsys translate_on
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`include "uart_defines.v"
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`include "uart_defines.v"
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module uart_transmitter (clk, wb_rst_i, lcr, tf_push, wb_dat_i, enable, stx_pad_o, state, tf_count, tx_reset, rx_lsr_mask);
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module uart_transmitter (clk, wb_rst_i, lcr, tf_push, wb_dat_i, enable, stx_pad_o, state, tf_count, tx_reset, lsr_mask);
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input clk;
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input clk;
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input wb_rst_i;
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input wb_rst_i;
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input [7:0] lcr;
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input [7:0] lcr;
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input tf_push;
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input tf_push;
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input [7:0] wb_dat_i;
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input [7:0] wb_dat_i;
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input enable;
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input enable;
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input tx_reset;
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input tx_reset;
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input rx_lsr_mask; //reset of fifo
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input lsr_mask; //reset of fifo
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output stx_pad_o;
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output stx_pad_o;
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output [2:0] state;
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output [2:0] state;
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output [`UART_FIFO_COUNTER_W-1:0] tf_count;
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output [`UART_FIFO_COUNTER_W-1:0] tf_count;
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reg [2:0] state;
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reg [2:0] state;
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.underrun( tf_underrun ),
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.underrun( tf_underrun ),
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.overrun( tf_overrun ),
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.overrun( tf_overrun ),
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.count( tf_count ),
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.count( tf_count ),
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.error_bit(), // Ta ni priklopljen. Prej je manjkal, dodal Igor
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.error_bit(), // Ta ni priklopljen. Prej je manjkal, dodal Igor
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.fifo_reset( tx_reset ),
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.fifo_reset( tx_reset ),
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.reset_status(rx_lsr_mask)
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.reset_status(lsr_mask)
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);
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);
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// TRANSMITTER FINAL STATE MACHINE
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// TRANSMITTER FINAL STATE MACHINE
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parameter s_idle = 3'd0;
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parameter s_idle = 3'd0;
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