| Line 61... |
Line 61... |
//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//
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//
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// CVS Revision History
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// CVS Revision History
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//
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//
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// $Log: not supported by cvs2svn $
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// $Log: not supported by cvs2svn $
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// Revision 1.14 2001/12/03 21:44:29 gorban
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// Updated specification documentation.
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// Added full 32-bit data bus interface, now as default.
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// Address is 5-bit wide in 32-bit data bus mode.
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// Added wb_sel_i input to the core. It's used in the 32-bit mode.
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// Added debug interface with two 32-bit read-only registers in 32-bit mode.
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// Bits 5 and 6 of LSR are now only cleared on TX FIFO write.
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// My small test bench is modified to work with 32-bit mode.
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//
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// Revision 1.13 2001/11/08 14:54:23 mohor
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// Revision 1.13 2001/11/08 14:54:23 mohor
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// Comments in Slovene language deleted, few small fixes for better work of
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// Comments in Slovene language deleted, few small fixes for better work of
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// old tools. IRQs need to be fix.
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// old tools. IRQs need to be fix.
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//
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//
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// Revision 1.12 2001/11/07 17:51:52 gorban
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// Revision 1.12 2001/11/07 17:51:52 gorban
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| Line 145... |
Line 154... |
//
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//
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// Transmitter FIFO signals
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// Transmitter FIFO signals
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wire [`UART_FIFO_WIDTH-1:0] tf_data_in;
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wire [`UART_FIFO_WIDTH-1:0] tf_data_in;
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wire [`UART_FIFO_WIDTH-1:0] tf_data_out;
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wire [`UART_FIFO_WIDTH-1:0] tf_data_out;
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wire tf_push;
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wire tf_push;
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wire tf_underrun;
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wire tf_overrun;
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wire tf_overrun;
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wire [`UART_FIFO_COUNTER_W-1:0] tf_count;
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wire [`UART_FIFO_COUNTER_W-1:0] tf_count;
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assign tf_data_in = wb_dat_i;
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assign tf_data_in = wb_dat_i;
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| Line 158... |
Line 166... |
.wb_rst_i( wb_rst_i ),
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.wb_rst_i( wb_rst_i ),
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.data_in( tf_data_in ),
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.data_in( tf_data_in ),
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.data_out( tf_data_out ),
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.data_out( tf_data_out ),
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.push( tf_push ),
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.push( tf_push ),
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.pop( tf_pop ),
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.pop( tf_pop ),
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.underrun( tf_underrun ),
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.overrun( tf_overrun ),
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.overrun( tf_overrun ),
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.count( tf_count ),
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.count( tf_count ),
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.error_bit(), // Ta ni priklopljen. Prej je manjkal, dodal Igor
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.error_bit(), // Ta ni priklopljen. Prej je manjkal, dodal Igor
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.fifo_reset( tx_reset ),
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.fifo_reset( tx_reset ),
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.reset_status(lsr_mask)
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.reset_status(lsr_mask)
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