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[/] [uart2bus/] [trunk/] [vhdl/] [rtl/] [baudGen.vhd] - Diff between revs 6 and 11
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-- baud_freq = 16*baud_rate / gcd(global_clock_freq, 16*baud_rate)
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-- baud_freq = 16*baud_rate / gcd(global_clock_freq, 16*baud_rate)
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-- second register:
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-- second register:
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-- baud_limit = (global_clock_freq / gcd(global_clock_freq, 16*baud_rate)) - baud_freq
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-- baud_limit = (global_clock_freq / gcd(global_clock_freq, 16*baud_rate)) - baud_freq
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--
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--
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-----------------------------------------------------------------------------------------
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-----------------------------------------------------------------------------------------
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library IEEE;
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library ieee;
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use IEEE.STD_LOGIC_1164.ALL;
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use ieee.std_logic_1164.all;
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use IEEE.STD_LOGIC_UNSIGNED.ALL;
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use ieee.std_logic_unsigned.all;
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entity baudGen is
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entity baudGen is
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port ( clr : in std_logic; -- global reset input
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port ( clr : in std_logic; -- global reset input
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clk : in std_logic; -- global clock input
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clk : in std_logic; -- global clock input
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-- baudFreq = 16 * baudRate / gcd(clkFreq, 16 * baudRate)
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-- baudFreq = 16 * baudRate / gcd(clkFreq, 16 * baudRate)
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