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[/] [uart2bus/] [trunk/] [vhdl/] [rtl/] [baudGen.vhd] - Diff between revs 6 and 11

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Rev 6 Rev 11
Line 7... Line 7...
--              baud_freq = 16*baud_rate / gcd(global_clock_freq, 16*baud_rate)
--              baud_freq = 16*baud_rate / gcd(global_clock_freq, 16*baud_rate)
-- second register:
-- second register:
--              baud_limit = (global_clock_freq / gcd(global_clock_freq, 16*baud_rate)) - baud_freq 
--              baud_limit = (global_clock_freq / gcd(global_clock_freq, 16*baud_rate)) - baud_freq 
--
--
-----------------------------------------------------------------------------------------
-----------------------------------------------------------------------------------------
library IEEE;
library ieee;
use IEEE.STD_LOGIC_1164.ALL;
use ieee.std_logic_1164.all;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
use ieee.std_logic_unsigned.all;
 
 
entity baudGen is
entity baudGen is
  port ( clr       : in  std_logic;                     -- global reset input
  port ( clr       : in  std_logic;                     -- global reset input
         clk       : in  std_logic;                     -- global clock input
         clk       : in  std_logic;                     -- global clock input
         -- baudFreq = 16 * baudRate / gcd(clkFreq, 16 * baudRate)
         -- baudFreq = 16 * baudRate / gcd(clkFreq, 16 * baudRate)

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