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Line 18... |
//-------------
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//-------------
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// VERSION NAME DATE DESCRIPTION
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// VERSION NAME DATE DESCRIPTION
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// 1 HANY SALAH 10012016 FILE CREATION
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// 1 HANY SALAH 10012016 FILE CREATION
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// 2 HANY SALAH 20012016 ADD BINARY MODE TESTS AND INVALID TESTS
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// 2 HANY SALAH 20012016 ADD BINARY MODE TESTS AND INVALID TESTS
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// 3 HANY SALAH 12022016 IMPROVE BLOCK DESCRIPTION & ADD COMMENTS
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// 3 HANY SALAH 12022016 IMPROVE BLOCK DESCRIPTION & ADD COMMENTS
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// 4 HANY SALAH 26062017 ADD COVERAGE DRIVEN TEST
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//-------------------------------------------------------------------------------------------------
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//-------------------------------------------------------------------------------------------------
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// ALL COPYRIGHTS ARE RESERVED FOR THE PRODUCER ONLY .THIS FILE IS PRODUCED FOR OPENCORES MEMBERS
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// ALL COPYRIGHTS ARE RESERVED FOR THE PRODUCER ONLY .THIS FILE IS PRODUCED FOR OPENCORES MEMBERS
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// ONLY AND IT IS PROHIBTED TO USE THIS MATERIAL WITHOUT THE CREATOR'S PERMISSION
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// ONLY AND IT IS PROHIBTED TO USE THIS MATERIAL WITHOUT THE CREATOR'S PERMISSION
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//-------------------------------------------------------------------------------------------------
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//-------------------------------------------------------------------------------------------------
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| Line 64... |
Line 65... |
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int matched ;
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int matched ;
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uvm_report_server report_server;
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uvm_report_server report_server;
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int hit_text_cov=90;
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int hit_bin_cov=90;
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int hit_mode_cov=90;
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`uvm_component_utils_begin(uart_base_test)
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`uvm_component_utils_begin(uart_base_test)
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`uvm_field_int(matched,UVM_ALL_ON)
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`uvm_field_int(matched,UVM_ALL_ON)
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`uvm_component_utils_end
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`uvm_component_utils_end
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function new (string name,uvm_component parent);
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function new (string name,uvm_component parent);
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Line 90... |
report_server = new();
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report_server = new();
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env_configuration();
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env_configuration();
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TE_configuration();
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TE_configuration();
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uvm_config_db#(uart_config)::set(this,"*","UART_CONFIGURATION",_config);
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uvm_config_db#(uart_config)::set(this,"*","UART_CONFIGURATION",_config);
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uvm_resource_db #(int)::set("coverage_cloud","text_coverage",0,null);
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uvm_resource_db #(int)::set("coverage_cloud","text_coverage",0,null);
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uvm_resource_db #(int)::set("coverage_cloud","binary_coverage",0,null);
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uvm_resource_db #(int)::set("coverage_cloud","general_coverage",0,null);
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endfunction:build_phase
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endfunction:build_phase
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function void connect_phase (uvm_phase phase);
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function void connect_phase (uvm_phase phase);
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super.connect_phase(phase);
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super.connect_phase(phase);
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endfunction:connect_phase
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endfunction:connect_phase
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| Line 633... |
Line 640... |
//
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//
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// Coverage Driven Test
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// Coverage Driven Test
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//
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//
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//-------------------------------------------------------------------------------------------------
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//-------------------------------------------------------------------------------------------------
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class all_tests extends uart_base_test;
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class cover_driven_test extends uart_base_test;
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rand int unsigned testnumber;
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rand int unsigned testnumber;
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bit coverage_hit=1'b0;
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bit coverage_hit=1'b0;
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int iteration=0;
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int iteration=0;
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parameter MAX_ITER=10000;
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parameter MAX_ITER=500;
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// Text write tests
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// Text write tests
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seq_1p1 seq1;
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seq_1p1 seq1;
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seq_1p2 seq2;
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seq_1p2 seq2;
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seq_1p3 seq3;
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seq_1p3 seq3;
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| Line 702... |
Line 709... |
// GRANT test
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// GRANT test
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seq_7p1 seq44;
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seq_7p1 seq44;
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seq_7p2 seq45;
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seq_7p2 seq45;
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`uvm_component_utils(all_tests)
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`uvm_component_utils(cover_driven_test)
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constraint validtest{testnumber inside{[0:45]};
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constraint validtest{testnumber inside{[0:45]};
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testnumber != 13;}
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testnumber != 13;
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testnumber != 9;
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testnumber != 19;
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testnumber != 21;
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testnumber != 24;}
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function new (string name,uvm_component parent);
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function new (string name,uvm_component parent);
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super.new(name,parent);
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super.new(name,parent);
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endfunction // new
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endfunction // new
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| Line 765... |
Line 776... |
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task run_phase (uvm_phase phase);
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task run_phase (uvm_phase phase);
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super.run_phase(phase);
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super.run_phase(phase);
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phase.raise_objection(this);
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phase.raise_objection(this);
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while(coverage_hit==1'b0 && (iteration < MAX_ITER) ) begin
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while(coverage_hit==1'b0 && (iteration < MAX_ITER) ) begin
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// while(iteration < 1000) begin
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iteration++;
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iteration++;
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randomize();
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randomize();
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case(testnumber)
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case(testnumber)
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0:
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0:
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begin
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begin
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| Line 963... |
Line 975... |
end // while (coverage_hit==1'b0)
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end // while (coverage_hit==1'b0)
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phase.drop_objection(this);
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phase.drop_objection(this);
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endtask // run_phase
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endtask // run_phase
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function void evaluate_coverage();
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function void evaluate_coverage();
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int text_coverage;
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int text_cov;
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uvm_resource_db#(int)::read_by_name("coverage_cloud","text_coverage",text_coverage);
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int bin_cov;
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if(text_coverage >= 80) coverage_hit=1'b1;
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int mode_cov;
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uvm_resource_db#(int)::read_by_name("coverage_cloud","text_coverage",text_cov);
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uvm_resource_db#(int)::read_by_name("coverage_cloud","general_coverage",mode_cov);
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uvm_resource_db#(int)::read_by_name("coverage_cloud","binary_coverage",bin_cov);
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if((text_cov >= hit_text_cov) &&
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(bin_cov >= hit_bin_cov) &&
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(mode_cov >= hit_mode_cov)) coverage_hit=1'b1;
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endfunction // evaluate_coverage
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endfunction // evaluate_coverage
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function void report_phase(uvm_phase phase);
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function void report_phase(uvm_phase phase);
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int coverage;
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int text_cov;
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int mode_cov;
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int bin_cov;
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super.report_phase(phase);
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super.report_phase(phase);
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if(!(iteration
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if(!(iteration
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begin
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begin
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uvm_resource_db#(int)::read_by_name("coverage_cloud","text_coverage",coverage);
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uvm_resource_db#(int)::read_by_name("coverage_cloud","text_coverage",text_cov);
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`uvm_warning("SIM",$sformatf("coverage not hit and reached %0d",coverage));
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uvm_resource_db#(int)::read_by_name("coverage_cloud","binary_coverage",bin_cov);
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uvm_resource_db#(int)::read_by_name("coverage_cloud","general_coverage",mode_cov);
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`uvm_warning("SIM",$sformatf("coverage not hit and reached \n textcov:%0d\nmodecov:%0d\nbincov:%0d",text_cov,mode_cov,bin_cov));
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end
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else begin
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`uvm_info("SIM",$sformatf("Simulation hit the coverage successfully by %0d transactions",iteration),UVM_NONE);
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end
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end
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endfunction // report_phase
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endfunction // report_phase
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endclass // all_tests
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endclass // cover_driven_test
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endclass // cover_driven_test
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endclass // cover_driven_test
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