Line 12... |
Line 12... |
|
|
|
|
"E:/uart_block/hdl/iseProject/INTERCON_P2P.vhd" line 95: Unconnected output port 'data_Avaible' of component 'uart_wishbone_slave'.
|
"E:/uart_block/hdl/iseProject/INTERCON_P2P.vhd" line 95: Unconnected output port 'data_Avaible' of component 'uart_wishbone_slave'.
|
|
|
|
|
|
"E:/uart_block/hdl/iseProject/SERIALMASTER.vhd" line 46: Width mismatch. <byteIncome> has a width of 8 bits but assigned expression is 32-bit wide.
|
|
|
|
|
"E:/uart_block/hdl/iseProject/uart_control.vhd" line 62: Unconnected output port 'reminder' of component 'divisor'.
|
"E:/uart_block/hdl/iseProject/uart_control.vhd" line 62: Unconnected output port 'reminder' of component 'divisor'.
|
|
|
|
|
Input <DAT_I<31:8>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
Input <DAT_I<31:8>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
|
|
Line 354... |
Line 357... |
|
|
|
|
Due to other FF/Latch trimming, FF/Latch <sigDivNumerator_8> (without init value) has a constant value of 0 in block <uUartControl>. This FF/Latch will be trimmed during the optimization process.
|
Due to other FF/Latch trimming, FF/Latch <sigDivNumerator_8> (without init value) has a constant value of 0 in block <uUartControl>. This FF/Latch will be trimmed during the optimization process.
|
|
|
|
|
FF/Latch <DAT_O_8> (without init value) has a constant value of 0 in block <SERIALMASTER>. This FF/Latch will be trimmed during the optimization process.
|
FF/Latch <DAT_O_8> (without init value) has a constant value of 0 in block <SERIALMASTER>. This FF/Latch will be trimmed during the optimization process.
|
|
|
|
|
Due to other FF/Latch trimming, FF/Latch <DAT_O_10> (without init value) has a constant value of 0 in block <SERIALMASTER>. This FF/Latch will be trimmed during the optimization process.
|
Due to other FF/Latch trimming, FF/Latch <DAT_O_10> (without init value) has a constant value of 0 in block <SERIALMASTER>. This FF/Latch will be trimmed during the optimization process.
|
|
|
|
|
Line 384... |
Line 387... |
|
|
|
|
Due to other FF/Latch trimming, FF/Latch <DAT_O_30> (without init value) has a constant value of 0 in block <SERIALMASTER>. This FF/Latch will be trimmed during the optimization process.
|
Due to other FF/Latch trimming, FF/Latch <DAT_O_30> (without init value) has a constant value of 0 in block <SERIALMASTER>. This FF/Latch will be trimmed during the optimization process.
|
|
|
|
|
Due to other FF/Latch trimming, FF/Latch <DAT_O_31> (without init value) has a constant value of 0 in block <SERIALMASTER>. This FF/Latch will be trimmed during the optimization process.
|
Due to other FF/Latch trimming, FF/Latch <DAT_O_31> (without init value) has a constant value of 0 in block <SERIALMASTER>. This FF/Latch will be trimmed during the optimization process.
|
|
|
|
|
FF/Latch <cycle_wait_oversample_31> (without init value) has a constant value of 0 in block <baud_generator>. This FF/Latch will be trimmed during the optimization process.
|
FF/Latch <cycle_wait_oversample_31> (without init value) has a constant value of 0 in block <baud_generator>. This FF/Latch will be trimmed during the optimization process.
|
|
|
|
|
Line 495... |
Line 498... |
|
|
|
|
The FF/Latch <cycle_wait_oversample_4> in Unit <baud_generator> is equivalent to the following 2 FFs/Latches, which will be removed : <half_cycle_5> <half_cycle0_3>
|
The FF/Latch <cycle_wait_oversample_4> in Unit <baud_generator> is equivalent to the following 2 FFs/Latches, which will be removed : <half_cycle_5> <half_cycle0_3>
|
|
|
|
|
FF/Latch <nextState_1> has a constant value of 0 in block <SERIALMASTER>. This FF/Latch will be trimmed during the optimization process.
|
FF/Latch <cycles2Wait_0> has a constant value of 0 in block <SERIALMASTER>. This FF/Latch will be trimmed during the optimization process.
|
|
|
|
|
|
Due to other FF/Latch trimming, FF/Latch <cycles2Wait_1> has a constant value of 0 in block <SERIALMASTER>. This FF/Latch will be trimmed during the optimization process.
|
|
|
|
|
|
Due to other FF/Latch trimming, FF/Latch <cycles2Wait_2> has a constant value of 0 in block <SERIALMASTER>. This FF/Latch will be trimmed during the optimization process.
|
|
|
|
|
|
Due to other FF/Latch trimming, FF/Latch <cycles2Wait_3> has a constant value of 0 in block <SERIALMASTER>. This FF/Latch will be trimmed during the optimization process.
|
|
|
|
|
|
Due to other FF/Latch trimming, FF/Latch <cycles2Wait_4> has a constant value of 0 in block <SERIALMASTER>. This FF/Latch will be trimmed during the optimization process.
|
|
|
|
|
|
Due to other FF/Latch trimming, FF/Latch <cycles2Wait_5> has a constant value of 0 in block <SERIALMASTER>. This FF/Latch will be trimmed during the optimization process.
|
|
|
|
|
|
Due to other FF/Latch trimming, FF/Latch <cycles2Wait_23> has a constant value of 0 in block <SERIALMASTER>. This FF/Latch will be trimmed during the optimization process.
|
|
|
|
|
|
Due to other FF/Latch trimming, FF/Latch <nextState_1> has a constant value of 0 in block <SERIALMASTER>. This FF/Latch will be trimmed during the optimization process.
|
|
|
|
|
Due to other FF/Latch trimming, FF/Latch <nextState_5> has a constant value of 0 in block <SERIALMASTER>. This FF/Latch will be trimmed during the optimization process.
|
Due to other FF/Latch trimming, FF/Latch <nextState_5> has a constant value of 0 in block <SERIALMASTER>. This FF/Latch will be trimmed during the optimization process.
|
|
|
|
|