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Subversion Repositories uart_block

[/] [uart_block/] [trunk/] [hdl/] [iseProject/] [_xmsgs/] [xst.xmsgs] - Diff between revs 29 and 30

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Rev 29 Rev 30
Line 27... Line 27...
 
 
 
 
Output <SEL_O> is never assigned. Tied to value 0.
Output <SEL_O> is never assigned. Tied to value 0.
 
 
 
 
 
Signal <pega_eu> is assigned but never used. This unconnected signal will be trimmed during the optimization process.
 
 
 
 
Output <data_avaible> is never assigned.
Output <data_avaible> is never assigned.
 
 
 
 
The FF/Latch <cycle_wait_oversample_24> in Unit <uBaudGen> is equivalent to the following 2 FFs/Latches, which will be removed : <half_cycle_25> <half_cycle0_23> 
The FF/Latch <cycle_wait_oversample_24> in Unit <uBaudGen> is equivalent to the following 2 FFs/Latches, which will be removed : <half_cycle_25> <half_cycle0_23> 
 
 

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