changes made to this file may result in unpredictable
changes made to this file may result in unpredictable
behavior or data corruption. It is strongly advised that
behavior or data corruption. It is strongly advised that
users do not edit the contents of this file. -->
users do not edit the contents of this file. -->
"E:/uart_block/hdl/iseProject/INTERCON_P2P.vhd" line 88: Unconnected output port 'CYC_O' of component 'SERIALMASTER'.
"E:/uart_block/hdl/iseProject/INTERCON_P2P.vhd" line 88: Unconnected output port 'CYC_O' of component 'SERIALMASTER'.
"E:/uart_block/hdl/iseProject/INTERCON_P2P.vhd" line 88: Unconnected output port 'SEL_O' of component 'SERIALMASTER'.
"E:/uart_block/hdl/iseProject/INTERCON_P2P.vhd" line 88: Unconnected output port 'SEL_O' of component 'SERIALMASTER'.
"E:/uart_block/hdl/iseProject/INTERCON_P2P.vhd" line 104: Unconnected output port 'data_Avaible' of component 'uart_wishbone_slave'.
"E:/uart_block/hdl/iseProject/INTERCON_P2P.vhd" line 104: Unconnected output port 'data_Avaible' of component 'uart_wishbone_slave'.
"E:/uart_block/hdl/iseProject/SERIALMASTER.vhd" line 49: Width mismatch. <byteIncome> has a width of 8 bits but assigned expression is 32-bit wide.
"E:/uart_block/hdl/iseProject/SERIALMASTER.vhd" line 49: Width mismatch. <byteIncome> has a width of 8 bits but assigned expression is 32-bit wide.
"E:/uart_block/hdl/iseProject/uart_control.vhd" line 65: Unconnected output port 'reminder' of component 'divisor'.
"E:/uart_block/hdl/iseProject/uart_control.vhd" line 65: Unconnected output port 'reminder' of component 'divisor'.
Input <DAT_I<31:8>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
Input <DAT_I<31:8>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
