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#ChipScope Core Inserter Project File Version 3.0
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#ChipScope Core Inserter Project File Version 3.0
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#Fri May 04 02:01:35 CEST 2012
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#Fri May 04 02:43:15 CEST 2012
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Project.device.designInputFile=E\:\\uart_block\\hdl\\iseProject\\INTERCON_P2P_cs.ngc
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Project.device.designInputFile=E\:\\uart_block\\hdl\\iseProject\\INTERCON_P2P_cs.ngc
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Project.device.designOutputFile=E\:\\uart_block\\hdl\\iseProject\\INTERCON_P2P_cs.ngc
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Project.device.designOutputFile=E\:\\uart_block\\hdl\\iseProject\\INTERCON_P2P_cs.ngc
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Project.device.deviceFamily=13
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Project.device.deviceFamily=13
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Project.device.enableRPMs=true
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Project.device.enableRPMs=true
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Project.device.outputDirectory=E\:\\uart_block\\hdl\\iseProject\\_ngo
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Project.device.outputDirectory=E\:\\uart_block\\hdl\\iseProject\\_ngo
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Project.device.useSRL16=true
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Project.device.useSRL16=true
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Project.filter.dimension=8
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Project.filter.dimension=12
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Project.filter<0>=
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Project.filter<0>=*genTick*
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Project.filter<1>=*_OBUF*
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Project.filter<10>=byte*
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Project.filter<2>=*_OBUF
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Project.filter<11>=byte
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Project.filter<3>=_OBUF
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Project.filter<1>=*baud*
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Project.filter<4>=*DAT_*
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Project.filter<2>=*avai*
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Project.filter<5>=*byte*
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Project.filter<3>=*rx*
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Project.filter<6>=byte*
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Project.filter<4>=
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Project.filter<7>=byte
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Project.filter<5>=*_OBUF*
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Project.filter<6>=*_OBUF
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Project.filter<7>=_OBUF
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Project.filter<8>=*DAT_*
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Project.filter<9>=*byte*
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Project.icon.boundaryScanChain=1
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Project.icon.boundaryScanChain=1
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Project.icon.enableExtTriggerIn=false
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Project.icon.enableExtTriggerIn=false
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Project.icon.enableExtTriggerOut=false
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Project.icon.enableExtTriggerOut=false
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Project.icon.triggerInPinName=
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Project.icon.triggerInPinName=
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Project.icon.triggerOutPinName=
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Project.icon.triggerOutPinName=
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Project.unit.dimension=1
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Project.unit.dimension=1
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Project.unit<0>.clockChannel=EXTCLK_BUFGP
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Project.unit<0>.clockChannel=uUartWishboneSlave/uUartCommunicationBlocks/uBaudGen/genTickOverSample
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Project.unit<0>.clockEdge=Rising
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Project.unit<0>.clockEdge=Rising
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Project.unit<0>.dataChannel<0>=uMasterSerial/DAT_O<0>
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Project.unit<0>.dataChannel<0>=rx_IBUF
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Project.unit<0>.dataChannel<1>=uMasterSerial/DAT_O<1>
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Project.unit<0>.dataChannel<1>=uUartWishboneSlave/uUartCommunicationBlocks/uBaudGen/genTick
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Project.unit<0>.dataChannel<2>=uMasterSerial/DAT_O<2>
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Project.unit<0>.dataChannel<2>=uUartWishboneSlave/uUartCommunicationBlocks/uBaudGen/genTickOverSample
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Project.unit<0>.dataChannel<3>=uMasterSerial/DAT_O<3>
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Project.unit<0>.dataChannel<3>=uUartWishboneSlave/uUartCommunicationBlocks/uReceiver/data_byte<3>
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Project.unit<0>.dataChannel<4>=uMasterSerial/DAT_O<4>
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Project.unit<0>.dataChannel<4>=uUartWishboneSlave/uUartCommunicationBlocks/uReceiver/data_byte<4>
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Project.unit<0>.dataChannel<5>=uMasterSerial/DAT_O<5>
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Project.unit<0>.dataChannel<5>=uUartWishboneSlave/uUartCommunicationBlocks/uReceiver/data_byte<5>
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Project.unit<0>.dataChannel<6>=uMasterSerial/DAT_O<6>
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Project.unit<0>.dataChannel<6>=uUartWishboneSlave/uUartCommunicationBlocks/uReceiver/data_byte<6>
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Project.unit<0>.dataChannel<7>=uMasterSerial/DAT_O<7>
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Project.unit<0>.dataChannel<7>=uUartWishboneSlave/uUartCommunicationBlocks/uReceiver/data_byte<7>
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Project.unit<0>.dataDepth=512
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Project.unit<0>.dataDepth=512
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Project.unit<0>.dataEqualsTrigger=true
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Project.unit<0>.dataEqualsTrigger=false
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Project.unit<0>.dataPortWidth=8
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Project.unit<0>.dataPortWidth=3
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Project.unit<0>.enableGaps=false
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Project.unit<0>.enableGaps=false
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Project.unit<0>.enableStorageQualification=false
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Project.unit<0>.enableStorageQualification=false
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Project.unit<0>.enableTimestamps=false
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Project.unit<0>.enableTimestamps=false
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Project.unit<0>.timestampDepth=0
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Project.unit<0>.timestampDepth=0
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Project.unit<0>.timestampWidth=0
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Project.unit<0>.timestampWidth=0
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Project.unit<0>.triggerChannel<0><0>=uUartWishboneSlave/uUartCommunicationBlocks/uReceiver/data_byte<0>
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Project.unit<0>.triggerChannel<0><0>=rx_IBUF
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Project.unit<0>.triggerChannel<0><1>=uUartWishboneSlave/uUartCommunicationBlocks/uReceiver/data_byte<1>
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Project.unit<0>.triggerChannel<0><1>=uUartWishboneSlave/uUartCommunicationBlocks/uReceiver/data_byte<1>
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Project.unit<0>.triggerChannel<0><2>=uUartWishboneSlave/uUartCommunicationBlocks/uReceiver/data_byte<2>
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Project.unit<0>.triggerChannel<0><2>=uUartWishboneSlave/uUartCommunicationBlocks/uReceiver/data_byte<2>
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Project.unit<0>.triggerChannel<0><3>=uUartWishboneSlave/uUartCommunicationBlocks/uReceiver/data_byte<3>
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Project.unit<0>.triggerChannel<0><3>=uUartWishboneSlave/uUartCommunicationBlocks/uReceiver/data_byte<3>
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Project.unit<0>.triggerChannel<0><4>=uUartWishboneSlave/uUartCommunicationBlocks/uReceiver/data_byte<4>
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Project.unit<0>.triggerChannel<0><4>=uUartWishboneSlave/uUartCommunicationBlocks/uReceiver/data_byte<4>
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Project.unit<0>.triggerChannel<0><5>=uUartWishboneSlave/uUartCommunicationBlocks/uReceiver/data_byte<5>
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Project.unit<0>.triggerChannel<0><5>=uUartWishboneSlave/uUartCommunicationBlocks/uReceiver/data_byte<5>
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Project.unit<0>.triggerMatchCount<0>=1
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Project.unit<0>.triggerMatchCount<0>=1
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Project.unit<0>.triggerMatchCountWidth<0><0>=0
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Project.unit<0>.triggerMatchCountWidth<0><0>=0
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Project.unit<0>.triggerMatchType<0><0>=0
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Project.unit<0>.triggerMatchType<0><0>=0
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Project.unit<0>.triggerPortCount=1
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Project.unit<0>.triggerPortCount=1
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Project.unit<0>.triggerPortIsData<0>=true
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Project.unit<0>.triggerPortIsData<0>=true
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Project.unit<0>.triggerPortWidth<0>=8
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Project.unit<0>.triggerPortWidth<0>=1
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Project.unit<0>.triggerSequencerLevels=16
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Project.unit<0>.triggerSequencerLevels=16
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Project.unit<0>.triggerSequencerType=0
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Project.unit<0>.triggerSequencerType=0
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Project.unit<0>.type=ilapro
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Project.unit<0>.type=ilapro
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