URL https://opencores.org/ocsvn/uart_block/uart_block/trunk

Subversion Repositories uart_block

[/] [uart_block/] [trunk/] [hdl/] [iseProject/] [fuse.log] - Diff between revs 16 and 17

Rev 16	Rev 17
Line 30...	Line 30...
`Compiling architecture behavioral of entity serial_receiver [serial_receiver_default]`	`Compiling architecture behavioral of entity serial_receiver [serial_receiver_default]`
`Compiling architecture behavioral of entity uart_communication_blocks [uart_communication_blocks_defaul...]`	`Compiling architecture behavioral of entity uart_communication_blocks [uart_communication_blocks_defaul...]`
`Compiling architecture behavioral of entity uart_wishbone_slave [uart_wishbone_slave_default]`	`Compiling architecture behavioral of entity uart_wishbone_slave [uart_wishbone_slave_default]`
`Compiling architecture behavior of entity testuart_wishbone_slave`	`Compiling architecture behavior of entity testuart_wishbone_slave`
`Time Resolution for simulation is 1ps.`	`Time Resolution for simulation is 1ps.`
`Waiting for 1 sub-compilation(s) to finish...`	`Waiting for 5 sub-compilation(s) to finish...`
`Compiled 21 VHDL Units`	`Compiled 21 VHDL Units`
`Built simulation executable /home/laraujo/work/uart_block/hdl/iseProject/testUart_wishbone_slave_isim_beh.exe`	`Built simulation executable /home/laraujo/work/uart_block/hdl/iseProject/testUart_wishbone_slave_isim_beh.exe`
`Fuse Memory Usage: 90276 KB`	`Fuse Memory Usage: 90148 KB`
`Fuse CPU Usage: 1280 ms`	`Fuse CPU Usage: 1280 ms`
`GCC CPU Usage: 670 ms`	`GCC CPU Usage: 4350 ms`
`GCC CPU Usage: 4350 ms`	`GCC CPU Usage: 4350 ms`