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ISim log file
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ISim log file
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Running: E:\uart_block\hdl\iseProject\testUart_wishbone_slave_isim_beh.exe -intstyle ise -gui -tclbatch isim.cmd -wdb E:/uart_block/hdl/iseProject/testUart_wishbone_slave_isim_beh.wdb
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Running: E:\uart_block\hdl\iseProject\testSerial_receiver_isim_beh.exe -intstyle ise -gui -tclbatch isim.cmd -wdb E:/uart_block/hdl/iseProject/testSerial_receiver_isim_beh.wdb
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ISim O.87xd (signature 0xc3576ebc)
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ISim O.87xd (signature 0xc3576ebc)
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----------------------------------------------------------------------
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----------------------------------------------------------------------
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WARNING:Security:42 - Your software subscription period has lapsed. Your current version of Xilinx tools will continue to function, but you no longer qualify for Xilinx software updates or new releases.
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WARNING:Security:42 - Your software subscription period has lapsed. Your current version of Xilinx tools will continue to function, but you no longer qualify for Xilinx software updates or new releases.
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| Line 11... |
Line 11... |
# onerror resume
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# onerror resume
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# wave add /
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# wave add /
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# run 1000 ms
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# run 1000 ms
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Simulator is doing circuit initialization process.
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Simulator is doing circuit initialization process.
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Finished circuit initialization process.
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Finished circuit initialization process.
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at 10 ns(1), Instance /testuart_wishbone_slave/uut/uUartControl/uDiv/ : Warning: There is an 'U'|'X'|'W'|'Z'|'-' in an arithmetic operand, the result will be 'X'(es).
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at 10 ns(1), Instance /testuart_wishbone_slave/uut/uUartControl/uDiv/ : Warning: There is an 'U'|'X'|'W'|'Z'|'-' in an arithmetic operand, the result will be 'X'(es).
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at 10 ns(1), Instance /testuart_wishbone_slave/uut/uUartCommunicationBlocks/uBaudGen/ : Warning: There is an 'U'|'X'|'W'|'Z'|'-' in an arithmetic operand, the result will be 'X'(es).
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** Failure:NONE. End of simulation.
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** Failure:NONE. End of simulation.
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User(VHDL) Code Called Simulation Stop
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User(VHDL) Code Called Simulation Stop
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In process testUart_wishbone_slave.vhd:stim_proc
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In process testSerial_receiver.vhd:stim_proc
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INFO: Simulator is stopped.
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ISim O.87xd (signature 0xc3576ebc)
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----------------------------------------------------------------------
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WARNING:Security:42 - Your software subscription period has lapsed. Your current version of Xilinx tools will continue to function, but you no longer qualify for Xilinx software updates or new releases.
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----------------------------------------------------------------------
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This is a Full version of ISim.
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# run 1000 ms
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Simulator is doing circuit initialization process.
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Finished circuit initialization process.
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ISim O.87xd (signature 0xc3576ebc)
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----------------------------------------------------------------------
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WARNING:Security:42 - Your software subscription period has lapsed. Your current version of Xilinx tools will continue to function, but you no longer qualify for Xilinx software updates or new releases.
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----------------------------------------------------------------------
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This is a Full version of ISim.
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# run 1000 ms
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Simulator is doing circuit initialization process.
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Finished circuit initialization process.
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Stopped at time : 107166 ns : File "E:/uart_block/hdl/iseProject/testSerial_receiver.vhd" Line 106
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# step
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Stopped at time : 107415 ns : File "E:/uart_block/hdl/iseProject/testSerial_receiver.vhd" Line 66
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# step
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Stopped at time : 107415 ns : File "E:/uart_block/hdl/iseProject/testSerial_receiver.vhd" Line 67
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# step
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Stopped at time : 107415 ns : File "E:/uart_block/hdl/iseProject/serial_receiver.vhd" Line 29
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# step
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Stopped at time : 107415 ns : File "E:/uart_block/hdl/iseProject/serial_receiver.vhd" Line 92
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# run all
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Stopped at time : 36220620100 ns : File "E:/uart_block/hdl/iseProject/testSerial_receiver.vhd" Line 66
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ISim O.87xd (signature 0xc3576ebc)
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----------------------------------------------------------------------
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WARNING:Security:42 - Your software subscription period has lapsed. Your current version of Xilinx tools will continue to function, but you no longer qualify for Xilinx software updates or new releases.
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----------------------------------------------------------------------
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This is a Full version of ISim.
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# run 1000 ms
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Simulator is doing circuit initialization process.
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Finished circuit initialization process.
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Stopped at time : 107166 ns : File "E:/uart_block/hdl/iseProject/testSerial_receiver.vhd" Line 106
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# step
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Stopped at time : 107415 ns : File "E:/uart_block/hdl/iseProject/testSerial_receiver.vhd" Line 66
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# run all
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Stopped at time : 5831395972500 ps : File "E:/uart_block/hdl/iseProject/serial_receiver.vhd" Line 37
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ISim O.87xd (signature 0xc3576ebc)
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----------------------------------------------------------------------
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WARNING:Security:42 - Your software subscription period has lapsed. Your current version of Xilinx tools will continue to function, but you no longer qualify for Xilinx software updates or new releases.
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----------------------------------------------------------------------
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This is a Full version of ISim.
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# run 1000 ms
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Simulator is doing circuit initialization process.
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Finished circuit initialization process.
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Stopped at time : 107166 ns : File "E:/uart_block/hdl/iseProject/testSerial_receiver.vhd" Line 106
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ISim O.87xd (signature 0xc3576ebc)
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----------------------------------------------------------------------
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|
WARNING:Security:42 - Your software subscription period has lapsed. Your current version of Xilinx tools will continue to function, but you no longer qualify for Xilinx software updates or new releases.
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----------------------------------------------------------------------
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This is a Full version of ISim.
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# run 1000 ms
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Simulator is doing circuit initialization process.
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Finished circuit initialization process.
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Stopped at time : 107166 ns : File "E:/uart_block/hdl/iseProject/testSerial_receiver.vhd" Line 108
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# run all
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Stopped at time : 176610 ns : File "E:/uart_block/hdl/iseProject/testSerial_receiver.vhd" Line 112
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ISim O.87xd (signature 0xc3576ebc)
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----------------------------------------------------------------------
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|
WARNING:Security:42 - Your software subscription period has lapsed. Your current version of Xilinx tools will continue to function, but you no longer qualify for Xilinx software updates or new releases.
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----------------------------------------------------------------------
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This is a Full version of ISim.
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# run 1000 ms
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Simulator is doing circuit initialization process.
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Finished circuit initialization process.
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ISim O.87xd (signature 0xc3576ebc)
|
|
----------------------------------------------------------------------
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|
WARNING:Security:42 - Your software subscription period has lapsed. Your current version of Xilinx tools will continue to function, but you no longer qualify for Xilinx software updates or new releases.
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----------------------------------------------------------------------
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This is a Full version of ISim.
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# run 1000 ms
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Simulator is doing circuit initialization process.
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Finished circuit initialization process.
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** Failure:Wrong result... expected 0xC4
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User(VHDL) Code Called Simulation Stop
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In process testSerial_receiver.vhd:stim_proc
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INFO: Simulator is stopped.
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ISim O.87xd (signature 0xc3576ebc)
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----------------------------------------------------------------------
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|
WARNING:Security:42 - Your software subscription period has lapsed. Your current version of Xilinx tools will continue to function, but you no longer qualify for Xilinx software updates or new releases.
|
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----------------------------------------------------------------------
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This is a Full version of ISim.
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# run 1000 ms
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Simulator is doing circuit initialization process.
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Finished circuit initialization process.
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** Failure:NONE. End of simulation.
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User(VHDL) Code Called Simulation Stop
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In process testSerial_receiver.vhd:stim_proc
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INFO: Simulator is stopped.
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ISim O.87xd (signature 0xc3576ebc)
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----------------------------------------------------------------------
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|
WARNING:Security:42 - Your software subscription period has lapsed. Your current version of Xilinx tools will continue to function, but you no longer qualify for Xilinx software updates or new releases.
|
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----------------------------------------------------------------------
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This is a Full version of ISim.
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# run 1000 ms
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Simulator is doing circuit initialization process.
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Finished circuit initialization process.
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** Failure:Wrong result... expected 0x55
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User(VHDL) Code Called Simulation Stop
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In process testSerial_receiver.vhd:stim_proc
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INFO: Simulator is stopped.
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ISim O.87xd (signature 0xc3576ebc)
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----------------------------------------------------------------------
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|
WARNING:Security:42 - Your software subscription period has lapsed. Your current version of Xilinx tools will continue to function, but you no longer qualify for Xilinx software updates or new releases.
|
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----------------------------------------------------------------------
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This is a Full version of ISim.
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# run 1000 ms
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Simulator is doing circuit initialization process.
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Finished circuit initialization process.
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Stopped at time : 107166 ns : File "E:/uart_block/hdl/iseProject/testSerial_receiver.vhd" Line 105
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ISim O.87xd (signature 0xc3576ebc)
|
|
----------------------------------------------------------------------
|
|
WARNING:Security:42 - Your software subscription period has lapsed. Your current version of Xilinx tools will continue to function, but you no longer qualify for Xilinx software updates or new releases.
|
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----------------------------------------------------------------------
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This is a Full version of ISim.
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# run 1000 ms
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Simulator is doing circuit initialization process.
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Finished circuit initialization process.
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Stopped at time : 107166 ns : File "E:/uart_block/hdl/iseProject/testSerial_receiver.vhd" Line 105
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# run all
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Stopped at time : 7368665202500 ps : File "E:/uart_block/hdl/iseProject/testSerial_receiver.vhd" Line 68
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ISim O.87xd (signature 0xc3576ebc)
|
|
----------------------------------------------------------------------
|
|
WARNING:Security:42 - Your software subscription period has lapsed. Your current version of Xilinx tools will continue to function, but you no longer qualify for Xilinx software updates or new releases.
|
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|
|
|
|
----------------------------------------------------------------------
|
|
This is a Full version of ISim.
|
|
# run 1000 ms
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Simulator is doing circuit initialization process.
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Finished circuit initialization process.
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Stopped at time : 107166 ns : File "E:/uart_block/hdl/iseProject/testSerial_receiver.vhd" Line 105
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# run all
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Stopped at time : 45201791145 ns : File "E:/uart_block/hdl/iseProject/testSerial_receiver.vhd" Line 66
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|
ISim O.87xd (signature 0xc3576ebc)
|
|
----------------------------------------------------------------------
|
|
WARNING:Security:42 - Your software subscription period has lapsed. Your current version of Xilinx tools will continue to function, but you no longer qualify for Xilinx software updates or new releases.
|
|
|
|
|
|
----------------------------------------------------------------------
|
|
This is a Full version of ISim.
|
|
# run 1000 ms
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Simulator is doing circuit initialization process.
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Finished circuit initialization process.
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Stopped at time : 105787500 ps : File "E:/uart_block/hdl/iseProject/serial_receiver.vhd" Line 186
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# run all
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Stopped at time : 107166 ns : File "E:/uart_block/hdl/iseProject/testSerial_receiver.vhd" Line 105
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# run all
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Stopped at time : 12853995542500 ps : File "E:/uart_block/hdl/iseProject/serial_receiver.vhd" Line 33
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|
ISim O.87xd (signature 0xc3576ebc)
|
|
----------------------------------------------------------------------
|
|
WARNING:Security:42 - Your software subscription period has lapsed. Your current version of Xilinx tools will continue to function, but you no longer qualify for Xilinx software updates or new releases.
|
|
|
|
|
|
----------------------------------------------------------------------
|
|
This is a Full version of ISim.
|
|
# run 1000 ms
|
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Simulator is doing circuit initialization process.
|
|
Finished circuit initialization process.
|
|
ISim O.87xd (signature 0xc3576ebc)
|
|
----------------------------------------------------------------------
|
|
WARNING:Security:42 - Your software subscription period has lapsed. Your current version of Xilinx tools will continue to function, but you no longer qualify for Xilinx software updates or new releases.
|
|
|
|
|
|
----------------------------------------------------------------------
|
|
This is a Full version of ISim.
|
|
# run 1000 ms
|
|
Simulator is doing circuit initialization process.
|
|
Finished circuit initialization process.
|
|
ISim O.87xd (signature 0xc3576ebc)
|
|
----------------------------------------------------------------------
|
|
WARNING:Security:42 - Your software subscription period has lapsed. Your current version of Xilinx tools will continue to function, but you no longer qualify for Xilinx software updates or new releases.
|
|
|
|
|
|
----------------------------------------------------------------------
|
|
This is a Full version of ISim.
|
|
# run 1000 ms
|
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Simulator is doing circuit initialization process.
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|
Finished circuit initialization process.
|
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Stopped at time : 107166 ns : File "E:/uart_block/hdl/iseProject/testSerial_receiver.vhd" Line 107
|
|
ISim O.87xd (signature 0xc3576ebc)
|
|
----------------------------------------------------------------------
|
|
WARNING:Security:42 - Your software subscription period has lapsed. Your current version of Xilinx tools will continue to function, but you no longer qualify for Xilinx software updates or new releases.
|
|
|
|
|
|
----------------------------------------------------------------------
|
|
This is a Full version of ISim.
|
|
# run 1000 ms
|
|
Simulator is doing circuit initialization process.
|
|
Finished circuit initialization process.
|
|
Stopped at time : 107166 ns : File "E:/uart_block/hdl/iseProject/testSerial_receiver.vhd" Line 107
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# run all
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** Failure:NONE. End of simulation.
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User(VHDL) Code Called Simulation Stop
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In process testSerial_receiver.vhd:stim_proc
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INFO: Simulator is stopped.
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INFO: Simulator is stopped.
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