URL https://opencores.org/ocsvn/uart_block/uart_block/trunk

Subversion Repositories uart_block

[/] [uart_block/] [trunk/] [hdl/] [iseProject/] [testUart_control.vhd] - Diff between revs 23 and 36

Rev 23	Rev 36
Line 55...	Line 55...
`-- Clock period definitions`	`-- Clock period definitions`
`constant clk_period : time := 20 ns; -- 20ns (50Mhz)`	`constant clk_period : time := 20 ns; -- 20ns (50Mhz)`

`BEGIN`	`BEGIN`

`-- Instantiate the Unit Under Test (UUT)`	`--! Instantiate the Unit Under Test (UUT)`
`uut: uart_control PORT MAP (`	`uut: uart_control PORT MAP (`
`rst => rst,`	`rst => rst,`
`clk => clk,`	`clk => clk,`
`WE => WE,`	`WE => WE,`
`reg_addr => reg_addr,`	`reg_addr => reg_addr,`