URL https://opencores.org/ocsvn/uart_fpga_slow_control_migrated/uart_fpga_slow_control_migrated/trunk

Subversion Repositories uart_fpga_slow_control_migrated

[/] [uart_fpga_slow_control/] [trunk/] [documents/] [set_baudrate.txt] - Diff between revs 6 and 10

Rev 6	Rev 10
Line 5...	Line 5...
`to change the speed edit the content of the WRITE_DIVLTC register`	`to change the speed edit the content of the WRITE_DIVLTC register`
`line 359 of the ab_uart_lbus_slave.vhd`	`line 359 of the ab_uart_lbus_slave.vhd`

`v_data_init <= "00000010"; -- DEC 2 Baudrate = 921600 bps @ 29,4912 MHz`	`v_data_init <= "00000010"; -- DEC 2 Baudrate = 921600 bps @ 29,4912 MHz`

	`other popular baudrates:`

	`v_data_init <= "00000100"; -- DEC 4 Baudrate = 230400 bps @ 29,4912 MHz`
	`v_data_init <= "00001000"; -- DEC 8 Baudrate = 115200 bps @ 29,4912 MHz`
	`....`